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3.2.12.1
Counter
Synch
Level
(C-SYNC)
-
Ilnitially,
when
reading
mark-track information either
in
the forward
or reverse
direction,
the first
code
to
be
recognized
and used for
synchronization
is
a
result
of the bit information formed
by
octal 525
or
725.
This
information appears after the
reverse
end mark
codes sequence
through
the
W—register.
The bit
configurations (shown
on
Figure
3-7)
is decoded
by
the
C-SYNCH
gating logic (location C1),
to
produce
a'
series
of C-SYNCH level
outputs
which condition
the control
register.
For the
Specific
mark-track
codes refer
to
Table 2-'l
.
a»—
TAPE MOTlON
MARK
REV BLOCK
EXTENélON
EXTENSION
FWD BLOCK
OCTAL.
4
5
2
5
2
5
2
6
525
1
O
O
1
0
1
O
1
0
1
O
1
O
1
O
1
0
1
0
1
0
1
1
0
Figure
3-7
Mark—Track Decoding
(C—SYNCH)
The first
code
recognized
by
the C-'SYNCH
gating
appears
at
CD.
These
nine
bits
are
de—
coded with the -3V
output
of $111
(location D2)
and with WRTM and
generate
the C-SYNCH levels for
all
Operations
except
write
timing
mark.
With
two
extension
marks
(E)
inserte
in
the
mark-track information,
the C-SYNCH
signal
will
appear six times
at
the
input
to
the AND gate and
produce
the C—SYNCH level
to reset
the control
clock.
Only
at
the last
decoding
@,
however,
will the control clock initiate
a
count
and
synchronize
the
counter
with the mark-track
information.
3.2.12.2
Start Block Marks
(MK
BLK
MK)
-
The
next
bit
configuration
in
the
W-register,
which
is
recognized,
is
the forward
or
reverse
block mark.
This
information appears
during
the
next
TPl
pulse
after the C- SYNCH
level
is
generated,
as
shown
on
Figure
3-6.
The
positive
transition of the TPO
pulse
which
precedes
the TP1
pulse
sets
the
counter
register
to
(1001).
The
W-register
information is
gated
with the
WM—
level
and
the
counter
register outputs,
C0(1),
and C1
(0),
to
generate
the MR BLK
MK
outputs,
as
shown
on
Figure
3-8.
The octal
2
position
of
the
reverse
guard mark,
in
the forward
tape direction,
or
octal
5
portion
of the
guard
mark
in
the
reverse
tape
direction is
recognized
together
with the lock marks
to
generate the
next
mark-track
signal
MK BLK START
as
shown
in
Figure
3-9.
3-23
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