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Genesys Logic GL823 Design Manual

Usb 2.0 sd/mmc card reader controller

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Genesys Logic, Inc.
GL823
USB 2.0 SD/MMC Card Reader
Controller
Design Guide
Rev. 1.00
Sep 8, 2009

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Summary of Contents for Genesys Logic GL823

  • Page 1 Genesys Logic, Inc. GL823 USB 2.0 SD/MMC Card Reader Controller Design Guide Rev. 1.00 Sep 8, 2009...
  • Page 2 GL823 Design Guide Copyright: Copyright © 2009 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Ownership and Title Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein.
  • Page 3: Revision History

    GL823 Design Guide Revision History Revision Date Description 1.00 09/08/2009 First formal release ©2009 Genesys Logic, Inc. - All rights reserved. Page 3...
  • Page 4 2. GENERAL MAIN BOARD LAYOUT GUIDELINE ........ 5 2.1 Component Routing and Placement............5 2.2 Recommended Layout Sequence ............5 2.3 Differential Signal ................... 5 2.4 Power Line ....................8 2.5 Card Interface Signal................8 ©2009 Genesys Logic, Inc. - All rights reserved. Page 4...
  • Page 5 The purpose of this document is to provide suggestions and descriptions for the design of PCB layout concerning the GL823 Card Reader Controller of Genesys Logic Inc., so that the client can verify in the shortest time and start mass production.
  • Page 6 USB signal traces shall be placed parallel as in Figure 2.2, not as in Figure2. 3. Figure 2.2 - Symmetric Routing with Differential Pairs Figure 2.3 - Bad Differential Pair Routing ©2009 Genesys Logic, Inc. - All rights reserved. Page 6...
  • Page 7 Figure 2.4 - Same Locations and Symmetric Routing for Vias Figure 2.5 - Differential Pair Guarded by Ground Plane 2.3.6 Place continuous ground area or power plane under signal traces. Please avoid crossing the different reference power plane. ©2009 Genesys Logic, Inc. - All rights reserved. Page 7...
  • Page 8 2.5.1 The space of two adjacent trace should be greater than double of trace width (2W rule) 2.5.2 GL823’s Pin “SD_CLK” is clock signals. Please make it far away from other signals to avoid the noise crosstalk. 2.5.3 Add a 4.7 F capacitor at SD card power (PMOS) trace and close to SD card connector.
  • Page 9 Keep the card bus as short as possible and keep the length of each data line equal in PCB design. Figure 2.7 - Use the 45° ° ° ° Bends, Preferred and Alternative Layout ©2009 Genesys Logic, Inc. - All rights reserved. Page 9...