Table of Contents
Advertisement
A
B
8
C4038
JG001
JG002
0.01 B
JG003
BOOT2
JG004
BOOT1
D4005
JG005
R4052
DUPTD1
JG006
1SS355
DUPRD1
4.7K
JG007
DUPTD0
NC
NC
JG008
DUPRD0
7
JG009
P.CON+5V_D
R4051
4.7K R4078
4.7K
R4089
4.7K
R4087
4.7K
6
FROM/TO MEMORY
208
207
206
205
3.3
HA0
SSCRXD
3.3
HA1
MEMCS(1)
HA2
3.3
VDDP
HA3
HA15
C4008
3.0
MEMAD(15)
HA4
HA16
0.1 F
3.0
HA5
MEMAD(16)
HA14
3.0
HA6
MEMAD(14)
HA7
HA13
3.3
MEMAD(13)
HA8
HA12
3.3
MEMAD(12)
HA9
HD15
0
HA10
MEMDA(15)
HA11
0.5
HA11
MEMAD(11)
HA12
2.6
HD7
MEMDA(7)
HA13
0
GNDP
HA14
HA10
0
HA15
MEMAD(10)
1.9
5
HD14
HA16
MEMDA(14)
HA17
HA9
0
MEMAD(9)
HA18
0
HD6
MEMDA(6)
HA19
HA8
0
MEMAD(8)
2.1
HD13
HD0
MEMDA(13)
HD1
HD5
2.0
MEMDA(5)
HD2
0
MEMAD(20)
HD3
C4010
3.3
HD4
VDDP
HD12
0.1
F
0.6
HD5
MEMDA(12)
3.3
HD6
WR
MEMWR#
HD7
HD4
2.6
MEMDA(4)
HD8
C4013
1.8
HD9
VDDC
HD11
0.1
F
2.7
HD10
MEMDA(11)
2.9
HD11
HD3
MEMDA(3)
HD12
HA19
0
MEMAD(19)
HD13
0
4
HD14
GNDC
0.5
HD10
HD15
MEMDA(10)
HA18
0
MEMAD(18)
MEMCS0
0
GNDP
RD
HD2
0.6
WR
MEMDA(2)
0
HA17
SD_A0
MEMAD(17)
SD_A1
HD9
0.6
MEMDA(9)
SD_A2
2.7
HA7
MEMAD(7)
SD_A3
HD1
2.7
SD_A4
MEMDA(1)
0.6
SD_A5
HA6
MEMAD(6)
0.4
SD_A6
HD8
MEMDA(8)
SD_A7
HA5
5.5
MEMAD(5)
SD_A8
3.3
C4014
SD_A9
VDDP
HD0
0.1 F
0.4
SD_A10
MEMDA(0)
3.3
SD_A11
HA4
MEMAD(4)
SD_D0
3
RD
0
MEMRD#
SD_D1
0
HA3
SD_D2
MEMAD(3)
HA2
0
SD_D3
MEMAD(2)
SD_D4
3.1
MEMCS0
MEMCS(0)#
SD_D5
3.1
HA1
MEMAD(1)
SD_D6
HA0
3.2
SD_D7
MEMAD(0)
0
SD_D8
GNDP
SD_D9
C4016 0.1 F
3.3
VDD-IP
SD_D10
3.3
C4017 0.1 F
VDDP
SD_D11
SD_D12
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
SD_D13
SD_D14
R4054
SD_D15
RAMCS0#
1K
RAMCS1#
R4053
RAMRAS#
2
RAMCAS#
1K
SD_BA0
RAMDQM
RAMWE#
RAMCLK
1
A
B
H-1
C
MPEG/MICON/DSP/RF_AMP SCHEMATIC DIAGRAM
C4096
0.001
B
C4032
0.001
B
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
208
SSCTXD
207
SSCCLK
206
DUPTD1
205
DUPRD1
MPEG/MICON/DSP/RF_AMP IC
IC4001
ZR36882ELCG
53
RAMADD(4)
54
RAMADD(3)
55
RAMADD(5)
56
RAMADD(2)
52
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
C
D
E
(DVD MT PCB)
VDDDAC
VDDAFERF
VDDPWM
+1.8V
+3.3V
B4001
MMZ1608R102CT
(10mA)
C4007
0.1
170
169
168
167
166
165
164
163
162
161
160
159
158
157
0
GNDDACBS2
0
GNDDACP
R4001
1.6
RSET
1.6
390
+-1%
C/B/U
3.3
VDDDAC
1.6
Y/R/V
1.6
CVBS/C
3.3
160
A
VDDDAC
1.6
CVBS/G/Y
159
G
1.2
Y/C
0
158
RFN
GNDDACD
0
GNDDACD
157
RFP
W836
1.6
GCLK
1.6
R4042
100
C4034
XO
51
1.8
27MHz
9P CH
VDDA
X4001
3.3
C4069_1
C4035
RESET#
100GT02720
6.3V
47
KA
0
GNDA
C4028
0.1 F
13P CH
0
GNDP
3.3
C4027 0.1 F
VDDP
3.3
HOME
IDGPCI/O(2)
JG028
0
PM16
GPCI/O(31)
R4072
33
3.3
(MIC_DET)
DJTCK / ICGPCI/O(3) / VID(0)
3.3
R4019
33
(DJTDO)
DJTO / GPCI/O(30) / VID(1)
R4020
100
0
I2C_CLK
DJTDI / GPCI/O(29) / VID(2)
0
R4021
100
I2C_DAT
DJTMS / GPCI/O(28) / VID(3)
1.8
C4030
VDDC
TP4007
0
0.1
F
GNDC
0
(ICETCK)
GPCI/O(27)
3.3
(ICETDO)
TP4010
IDGPI/O(1)
3.3
(MUTEC)
ICGPCI/O(2)
3.3
(ICETMS)
GPCI/O(26)
3.3
C4029 0.1 F
VDDP
3.3
(PM11)
JG021
ICGPCI/O(1)
0
GNDP
3.3
TP4017
HSYNC
3.3
TP4018
VSYNC
3.3
R4024
AIN
C4031
0.01 B
3.3
4.7K
VDDP-A2
1.7
IAMCLK
AMCLK
100
RAMDAT(14)
0
GNDP-A2
1.7
IABCLK
101
GNDP
ABCLK
1.6
IALRCLK
ALRCLK
102
RAMDAT(1)
0
JG024
GPAI/O
103
RAMDAT(15)
1.1
AOUT(0)
0
TP4015
104
RAMDAT(0)
AOUT(1)
0
TP4016
AOUT(2)
B4010
1.6
SPDIF
0
MIC_ON
JG020
MMZ1608R102CT
IDGPCI/O(0)
0
(PM1)
ICGPCI/O(0)
0
GNDP
0
R4014
GPCI/O(20)
3.3
C4026
0.1 F
VDDP
100
101 102 103 104
B4006
(250mA)
MMZ1608R102CT
D
E
F
G
W827
W817
DUPTD1
(RF_GND)
(A_GND)
(D_GND)
B4002
(120mA)
MMZ1608R102CT
B4003
(250mA)
MMZ1608R102CT
R4067
(10mA)
B4005
10K
(130mA)
MMZ1608R102CT
B4015
F
MMZ1608R102CT
TIN
DAC_VIDEO_C
DAC_VIDEO_B
DAC_VIDEO_D
R4016
RESET
100
C4081
0.1 F
HOME
ML
TP4004
MC
TP4006
MD
TP4005
TP4008
D1_2
D1_1
W842
TP4009
SYS_MUTE
R4025 220
53
AMCLK
R4026 220
ABCLK
ALRCLK
R4027 220
ASDATA0
R4058
220
54
C4098 10P CH
R4071
SPDIF
150
4.7K
NOTE:THE DC VOLTAGE EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK.
F
G
H
8
FROM/TO AUDIO/VIDEO
SYS_MUTE
DAC_VIDEO_C
DAC_VIDEO_B
ASDATA0
ABCLK
ALRCLK
AMCLK
MD
MC
ML
RESET
SPDIF
7
DUPRD1
RX/RDY[I/O[0]]
FROM/TO MOTOR DRIVE
VDDPWM3.3V
TRAY_OPEN
6
TRAY_CLOSE
HOME
TOUT_SW
D4008
TIN_SW
1SS355
DVD_CD
DRVSB
RF
OPU_A
OPU_B
OPU_C
OPU_D
OPU_E
OPU_F
VC
SPDL_SENS-
SPDL_SENS+
DVD/CDPD
5
DVD_LD
CD_LD
SPINDLE_PWM
SLED_PWM
TRACK_PWM
FOCUS_PWM
GND
(RF_GND)
4
FROM REGULATOR2
P.CON+3.3V_D
P.CON+5V_D
3
P.CON+1.8V_D
GND
(GND,D_GND)
2
PCB130
DMF066
1
H
H-2
Advertisement
Table of Contents
