8.2 Features
This section explains the features of the DMA controller (DMAC).
Channels
: 16 channels
Address space
: 32-bit address space (4 GB)
Transfer mode
: Block/burst transfer
Address update : Increment/Decrement/Fixed (Address increment/decrement range : 1, 2, 4)
Transfer size
: 8-bits, 16-bits, 32-bits
Block size
: 1 to 16
Transfer count
: 1 to 65535
Transfer request :
Software transfer requests
Transfer requests by peripheral interrupt (for the transfer request by peripheral interrupt, you should select
interrupt by channels. See "Chapter: Generation and Clearing of DMA Transfer Requests".)
Transfer stop request : Transfer stop request by interrupts
Reload function : All channels can be specified for reload
Transfer source address reload
Transfer destination address reload
Transfer count reload
Priority :
Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ch.4 > ch.5 > ch.6 > ch.7 > ch.8 > ch.9 > ch.10 > ch.11 > ch.12 > ch.13 > ch.14
> ch.15)
Round robin
Interrupt request : Normal completion interrupt requests, abnormal completion interrupt requests, and transfer suspend
interrupt requests by transfer stop requests can be generated
CY91590 Series FR81S Hardware Manual, Document Number: 002-05526 Rev. *B
DMA Controller (DMAC)
369
Need help?
Do you have a question about the CY91590 Series and is the answer not in the manual?
Questions and answers