Adc Timing Modes; Sampling Rate - JYTEK JY6301 User Manual

High accuracy, 24bits resolution temperature input module for resistancetemperature detector
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6.2.2 ADC Timing Modes

The ADC Timing Mode uses the built-in digital filters to reduce the measurement
noise. The ADC Timing mode affects the data output rate and 50 Hz / 60 Hz noise
rejection. The lower the ADC conversion rate, the better the noise rejection.
The JY6301 driver provides a total of 6 ADC convesrion rates, from Level 0 to Level 5.
Level 0 has the slowest conversion rate and best noise rejection. Level 5 has the
fastest conversion rate and worst noise suppression performance.
The reciprocal of the ADC conversion rate is the time required for each A/D
conversion.
Table 17 A/D conversion time at different speed levels
In the default configuration, the conversion rate level is set to Auto, and the drive
will automatically select the lowest possible rate level according to the sampling rate
and the number of added channels. If the user explicitly configures the rate level, the
driver will automatically limit the highest sampling rate according to the number of
added channels and the rate level. If the user-set sampling rate exceeds the limit, the
driver will adjust it to nearest rate level. The conversion rate is set to the maximum
possible.
For a more detailed description of the relationship between Timing Modes and
sampling rates, please refer to Section 6.2.3.

6.2.3 Sampling Rate

When JY6301 works, each sample contains the completion of an A/D converter
(Convert) on all channels, the principle is as in Figure 12.
PCIe/PXIe-6301 Series |
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