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CLM920_AC5 Mini PCIE LTE Module Product name Hardware Manual Number of pages V1.2 Version Date 2020/5/11 CLM920_AC5 Mini PCIE LTE Module Hardware Manual V1.2 Shanghai YUGE Information Technology Co., Ltd.
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CLM920_AC5 Mini PCIE LTE Module Hardware Manual History record Version Date Author Description V1.0 20190505 David Initial V1.1 20190704 David Update current consumption V1.2 20200511 David Update the interface definition section - 2 - Shanghai Yuge Information Technology co., LTD...
Electromagnetic Compatibility Electro Magnetic Interference Electronic Static Discharge EVDO Evolution Data Only Full Rate GPRS General Packet Radio Service Half Rate IMEI International Mobile Equipment Identity International Standards Organization Phase Locked Loop - 7 - Shanghai Yuge Information Technology co., LTD...
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CLM920_AC5 Mini PCIE LTE Module Hardware Manual Point-to-point protocol Random Access Memory Read-only Memory Real Time Clock Short Message Service UART Universal asynchronous receiver-transmitter User Identifier Management Universal Serial Bus VSWR Voltage Standing Wave Ratio - 8 - Shanghai Yuge Information Technology co., LTD...
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PCM voice interface Power interface Network status indication interface Main set antenna connector (MM4829-2702RA4) Antenna connector Diversity Antenna Connector (MM4829-2702RA4) LTE: Class 3 (23dBm±2dB) Transmit power UMTS: Class 3 (24dBm+1/-3dB) WCDMA: Data service - 10 - Shanghai Yuge Information Technology co., LTD...
The CLM920_AC5 Mini PCIE module mainly includes the following circuit units.: Baseband processing unit Power management unit Memory unit RF transceiver unit RF front end unit. - 11 - Shanghai Yuge Information Technology co., LTD...
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CLM920_AC5 Mini PCIE LTE Module Hardware Manual The functional block diagram of the CLM920_AC5 Mini PCIE module is shown below: Figure 2-1 Functional block diagram of the CLM920_AC5 Mini PCIE module - 12 - Shanghai Yuge Information Technology co., LTD...
RF antenna interface. 3.2 Module interface 3.2.1 52-pin gold finger CLM920_AC5 Mini PCIE module uses 52-pin Mini PCIE gold finger as external interactive interface. Figure 3-1 Gold finger TOP surface and BOTTOM surface - 13 - Shanghai Yuge Information Technology co., LTD...
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Table 3-1 IO parameter definition Symbol sign Description Two-way input and output Power input Power Output Analog input Analog output Digital input Digital output Table 3-2 Interface definition Standard Module Functional description Remarks definition definition - 14 - Shanghai Yuge Information Technology co., LTD...
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Turn off RF Active low communication Ground PERST# RESET Reset control Active low PERn0 3.3Vaux VBAT power input PERp0 UART_RTS * Serial request sending Ground Ground 1.5V UART_CTS * Serial port clear Ground - 15 - Shanghai Yuge Information Technology co., LTD...
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The module's general IO port level is 1.8V (except SIM, the SIM card port level supports 1.8V and 3.0V). This module defines that the pins of RESERVED and NC are left floating and must not be used. - 16 - Shanghai Yuge Information Technology co., LTD...
DCDC or LDO to provide sufficient current. Then control the VBAT power supply through the MOS tube, so that the module can be completely powered off. The actual use can refer to the following circuit design: - 17 - Shanghai Yuge Information Technology co., LTD...
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1. In order to prevent damage to the module caused by surge and overvoltage, it is recommended to connect a 5.1V / 500mW Zener diode in parallel to the VBAT pin of the module. - 18 - Shanghai Yuge Information Technology co., LTD...
VDD_EXT pin. Table 3-4 Pin Definition of Switch Reset Signal name High value Description RESET 1.8V Module reset control pin, active low - 19 - Shanghai Yuge Information Technology co., LTD...
150-450ms. The RESET pin is sensitive to interference, keep away from radio frequency interference signals when routing. - 20 - Shanghai Yuge Information Technology co., LTD...
3.5 USB interface CLM920_AC5 Mini PCIE module USB interface supports USB2.0 high-speed protocol, supports slave mode, does not support USB charging mode. The USB input and output wiring - 21 - Shanghai Yuge Information Technology co., LTD...
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USB bus power, the module can only be used as a slave device of the USB bus device. The USB interface can support the following functions: - 22 - Shanghai Yuge Information Technology co., LTD...
UART_RTS * The module requests the user to send If you need to use the serial port, please refer to the following serial port design. Figure 3-11 UART serial port design - 23 - Shanghai Yuge Information Technology co., LTD...
The CLM920_AC5 Mini PCIE module does not have its own USIM card slot. Users need to design a USIM card slot on their own interface board. The reference design drawing of the USIM card interface is as follows: - 24 - Shanghai Yuge Information Technology co., LTD...
The UIM_DET pin is pulled high by default. Table 3-10 Definition of SIM card hot swap detection pins UIM_DET status Functional description high SIM card insertion, UIM_DET is high - 25 - Shanghai Yuge Information Technology co., LTD...
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AT ^ RPTFLAG = 0 to enable the wake up function (need to be valid every time you turn on the settings) - 26 - Shanghai Yuge Information Technology co., LTD...
3.10 RF antenna interface The CLM920_AC5 Mini PCIE module is designed with two antenna interfaces, one main antenna and one diversity antenna. 4G recommends connecting a diversity antenna to limit the - 27 - Shanghai Yuge Information Technology co., LTD...
RF connection cable with as little insertion loss as possible. MM9329-2700 connector from Murata is recommended。 Figure 3-17 Dimensional drawing of the RF connector Table 3-14 RF connector main parameters - 28 - Shanghai Yuge Information Technology co., LTD...
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100PF, C1 / C2 / C3 / C4 defaults to empty stickers. To prevent damage to the internal of the module, it is recommended Choose a two-way TVS tube at the antenna connection D1 / D2. Figure 3-19 Main and diversity antenna matching circuits - 29 - Shanghai Yuge Information Technology co., LTD...
PCM frame synchronization signal Table 3-16 PCM specific parameters Characteristic Description Encoding format Linear Data bit 16bits Master-slave mode Master/slave mode PCM clock 2048kHz PCM frame synchronization Short frame Data Format - 30 - Shanghai Yuge Information Technology co., LTD...
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CLM920_AC5 Mini PCIE LTE Module Hardware Manual Figure 3-21 PCM short frame mode timing diagram - 31 - Shanghai Yuge Information Technology co., LTD...
Table 5-3 Working voltage of CLM920_AC5 Mini PCIE module Parameter Typical VBAT 3.3V 3.7V 4.2V UIM_PWR 1.7V/2.75V 1.8V/2.85V 1.9V/2.95V The power-on time of any interface of the module should not be earlier than the power-on - 36 - Shanghai Yuge Information Technology co., LTD...
Table 5-4 CLM920_AC5 Mini PCIE ESD features Test port Contact discharge Air discharge unit USB interface ±4 ±8 USIM interface ±4 ±8 Analog voice interface ±4 ±8 VBAT power supply ±4 ±8 - 37 - Shanghai Yuge Information Technology co., LTD...
The CLM920_AC5 Mini PCIE module interface conforms to the PCI Express Mini Card 1.2 interface standard,PCI Express Mini Card connectors that meet this standard can be used with it, such as Molex's 679100002. Figure 6-2 Connector dimensions - 38 - Shanghai Yuge Information Technology co., LTD...
CLM920_AC5 Mini PCIE LTE Module Hardware Manual 6.3 Module fixing method CLM920_AC5 Mini PCIE module is fixed with two screw holes for grounding. - 39 - Shanghai Yuge Information Technology co., LTD...
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