Yamaha ICP1 Service Manual page 10

Intelligent control panel
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ICP1
QQ
3 7 63 1515 0
SIS60000F00A500 (X4834A00) Intelligent Network Controller
PIN
NAME
I/O
NO.
1
GPIO15/DTR#
I/O
2
GPIO14/RTS#
I/O
3
GPIO13/DSR#
I/O
4
GPIO12/CTS#
I/O
General Purpose I/O [15:8]
5
GPIO11/RSV1
I/O
6
GPIO10/MODE
I/O
7
GPIO9/TXD
I/O
8
GPIO8/RXD
I/O
9
V
Power supply (–) GND
SS
10
GPIO7/OSCCTL
I/O
11
GPIO6
I/O
12
GPIO5
I/O
General Purpose I/O [7:0]
13
GPIO4
I/O
14
GPIO3
I/O
15
GPIO2/CRS
I
MII Carrier Sense
16
GPIO1
I/O
General Purpose I/O [7:0]
17
GPIO0/INT0
I/O
18
V
Built-in logic power supply (+)
DD
19
EP_CS
O
EEPROM Chip Select
20
EP_SK
O
EEPROM Serial Clock
21
EP_DI
I
EEPROM Data In
22
EP_DO
O
EEPROM Data Out
23
SCL
OD/I
I
2
24
SDA
OD/I
I
2
25
V
Power supply (–) GND
SS
26
MII_COL
I
MII Collision Detect
27
MII_TXD3
O
28
MII_TXD2
O
MII Transmit Data
29
MII_TXD1
O
30
MII_TXD0
O
TE
L 13942296513
31
MII_TXEN
O
MII Transmit Enable
32
V
Built-in logic power supply (+)
DD
33
MII_TXCLK
I
MII Transmit Clock
34
MII_RXER
I
MII Receive Error
35
MII_RXCLK
I
MII Receive Clock
36
MII_RXDV
I
MII Receive Data Valid
37
MII_RXD0
I
38
MII_RXD1
I
MII Receive Data
39
MII_RXD2
I
40
MII_RXD3
I
41
MDC
O
MII Management Interface Clock
42
MDIO
I/O
MII Management Interface Data I/O
43
OSC2
O
OSC1 clock pin
44
V
Built-in logic power supply (+)
DD
45
V
Power supply (–) GND
SS
46
OSC1
I
OSC1 clock pin
47
V
Built-in logic power supply (+)
DD
48
HCS#
I
Host Chip Select: It is the host interface access control signal.
49
HA0
I
Host Address: It is the host interface port select signal.
50
HA1
I
www
.
10
http://www.xiaoyu163.com
FUNCTION
C Serial Clock
C Serial Data
x
ao
y
i
http://www.xiaoyu163.com
8
PIN
NAME
I/O
NO.
51
HA2
I
52
VSS
53
HD0
I/O
54
HD1
I/O
55
HD2
I/O
56
HD3
I/O
57
HD4
I/O
58
HD5
I/O
59
HD6
I/O
60
HD7
I/O
61
V
DD
62
HD8
I/O
63
HD9
I/O
64
HD10
I/O
65
HD11
I/O
66
HD12
I/O
67
HD13
I/O
68
HD14
I/O
69
HD15
I/O
70
V
SS
71
HRD0#
I
72
HRD1#
I
73
HWR0#
I
74
HWR1#
I
75
HINT
Tri
76
Reserve
77
Reserve
78
HIFSEL0
I
79
V
DD
Q Q
80
PLLC
3
6 7
1 3
81
TEST0
I
82
HIFSEL1
I
83
HIFSEL2
I
84
HMUX
I
85
HINTPOL
I
86
TEST1
I
87
OSC4
O
88
V
SS
89
OSC3
I
90
V
DD
91
RESET#
I
92
HENDIAN
I
93
HSIZE
I
94
OSCO
O
95
DSIO
I/O
96
DST0
O
97
DST1
O
98
DST2
O
99
DPCO
O
100
DCLK
O
u163
.
2 9
9 4
2 8
FUNCTION
Host Address: It is the host interface port select signal.
Power supply (–) GND
Host Data: Data signal line of the host interface.
Built-in logic power supply (+)
Host Data: Data signal line of the host interface.
Power supply (–) GND
Host Read/Host Write
Host Interrupt
These pins are reserved for future expansion.
Host Interface Select
Built-in logic power supply (+)
PLL capacitor connecting pin
1 5
0 5
8
2 9
9 4
Test Input
Host Interface Select
Host Bus Multiplex
Host Interrupt Polarity Select
Test Input
OSC3 clock pin
Power supply (–) GND
OSC3 clock pin
Built-in logic power supply (+)
Hardware Reset Input
Host Interface Endian Select
Host Bus Size Select
OSC output pin
These pins are used for communication
with the debug tool ICD33.
m
co
9 9
DM: IC402
2 8
9 9

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