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outputs the result signal to DATA_IO pin. That demodulated signal is inverted from modulated signal.
(1)
Reference Voltage
The reference voltage of Data Comparator (vref) is determined by the value tracking input voltage of
Data Comparator (vi) with slow time constant. The time constant is nr / fbc, and nr is set by
register:h'1B[D5:D3]Cmp_Ref2..0. Set it suitable with considering the signal data rate or coding.
Time constant = nr / fbc
* fbc: internal clock frequency set by Bit Rate Filter, register:h'0E [D4:D1]BRF_Bit3..0
The duty of Data Comparator output will be worse, due to the large fluctuation of vref caused by
setting of unsuitable time constant or number of consecutive data with the same sign. Then suitable
time constant can be simply calculated by the following equation. In the equation, vdiff[%] is
fluctuation of vref and t is a maximum number of consecutive data of the same sign minus 1.
- Way of Setting
Time constant = nr / fbc = t / -ln( 1 - vdiff / 100 )
- Calculation Example
Data Rate = 600 Hz
fbc = 23.69 kHz (Set the cutoff frequency of Bit Rate Filter as 619 Hz.)
fluctuation of vref = 10%
The number of consecutive data with the same sign: 4
t = (4-1) / (2 x 600) = 0.0025s
nr/fbc = 0.0025 / (-ln(1-10/100)) = 0.0237
nr = 0.0237 x 23690 = 561.45
Suitable setting value of register: h'1B [D5:D3] is b'100(nr=512). This value is the nearest of 561.45.
The average of vref can be monitored from register: h'21[D7:D0]Ref_bias7..0 and the fluctuation of vref
can be monitored from register:h'20[D7:D0]Ref_diff7..0. Also vref can be monitored from
DET_TMONI3 or 4 pin. Because the time constant set by Data Comparator Reference Voltage Charge
Coefficient (h'1B[D5:D3]Cmp_Ref2..0) is slower than the signal data rate, the rising time of the signal
will be taken long. Data Comparator output voltage will reach 90% of vref with "nr / fbc x 2.30". To
shorten rising time of the signal, use the function of Data Comparator Quick Charge 1 or 2.
(2)
Data Comparator Quick Charge 1 (During a certain period)
The function is able to shorten the start period of TC32306FTG because time constant of vref will
change to 1/16 or 1/4 only during that period. During start period, the output signal duty will be worse
than that during normal condition, but Data Comparator output is obtained faster than the condition
without Quick Charge 1. After finishing the certain period, the output signal duty will be improved
because the time constant becomes nr / fbc (Normal condition).
Time Constant
Validity Period
The time constant is switched as the Fastest à Faster à Normal.
(3)
Data Comparator Quick Charge 2 (Tracking to correspond to the voltage difference)
When the difference between the reference voltage of Data Comparator (vref) and the input voltage of
it is larger than preset voltage threshold level (vth), the vref will track the vi as following time
constant.
When the difference between vref and vi is large such as in the start period, Data Comparator output
is obtained faster than the condition with Quick Charge 1.
Time constant = nr' / fbc
Data Comparator output voltage will reach 90% of vref with "nr / fbc x 2.30[s]".
*nr': inverse number of (1/nr + 1/nc)
Table 6-26 Quick Charge 1
Functional Period of Quick Charge 1
The Fastest
(nr / fbc) x 1/16
(nr / fbc) x 1/4
(nr / 4) / fbc
(nr / 2) / fbc
28
Normal
Faster
nr / fbc
-
TC32306FTG
2015-10-01
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