Philips P&S 22HFL4372D/10 Service Manual page 54

EN 54 8. Q552.1HE LA
8.12 Diagram TCON DC/DC
Block diagram & Pinning information
NAME
SD
RIN
LIN
GAIN0
GAIN1
MUTE
BSL
PVCCL
LOUT
PGNDL
VCLAMP
BSR
ROUT
PGNDR
PVCCR
AGND
AGND
BYPASS
AVCC
Thermal pad
2010-Nov-19
IC Data Sheets
HC02, TPA3124D2 (IC U602)
AVCC AVDD
(19, 20)
REGULATOR
LIN
(5)
AGND
(8, 9)
SD
(2)
MUTE
MUTE
CONTROL
(4)
BYPASS BYPASS
(7)
GAIN1
(17)
AV
CONTROL
GAIN0
(18)
RIN
(6)
TERMINAL
I/O/P
24-PIN
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
2 I
AVCC
6 I Audio input for right channel
5 I Audio input for left channel
18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
4 I
outputs enabled). TTL logic levels with compliance to AVCC
21 I/O Bootstrap I/O for left channel
1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
22 O Class-D 1/2-H-bridge positive output for left channel
23, 24 P Power ground for left-channel H-bridge
11 P Internally generated voltage supply for bootstrap capacitors
16 I/O Bootstrap I/O for right channel
15 O Class-D 1/2-H-bridge negative output for right channel
13, 14 P Power ground for right-channel H-bridge.
10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
9 P Analog ground for digital/analog cells in core
8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
7 O
external capacitor sizing.
19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Die pad P
secure device to printed wiring board.
Figure 8-12 Internal block diagram and pin configuration
+
VCLAMP
–
AVDD
AVDD
SC
DETECT
AVDD/2
CONTROL
BIAS
THERMAL
OSC/RAMP
SC
DETECT
–
VCLAMP
+
AVDD
AVDD
AVDD/2
DESCRIPTION
back to
div. table
BSL
(21)
PVCCL
(1, 3)
HS
LOUT
(22)
LS
PGNDL
(23, 24)
VCLAMP
(11)
BSR
(16)
PVCCR
(10, 12)
HS
ROUT
(15)
LS
PGNDR
(13, 14)
19040_300_101110.eps
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