Toshiba H1 Series Data Book page 440

32bit micro controller tlcs-900/h1 series
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5.
Below is transaction when SOF token from host is received.
Change the packet A's FIFO from X Condition to Y Condition. And
clear data.
Change the packet B from Y Condition to X Condition.
Set frame number to frame register.
Assert SOF and inform that frame is incremented to external.
DATASET register clears packet A bit and it sets packet B bit
arrangement loading in present frame.
Set STATUS to READY.
UDC finishes normally by above transaction.
Packet A's FIFO can be received next data.
In renewed frame, Packet A's FIFO interchange packet B's FIFO, and
transaction is used same flow.
If SOF token is not received by error and so on, this data is lost because of
frame is not renewed. Nothing problem in receiving PID and if frame data is
received with CRC error, USB sets LOST to STATUS on FRAME register, and
frame number is not renewed. However, in this case, SOF is asserted and
FIFO condition is renewed. If SOF token is received without transmit and
transfer Isochronous in frame, UDC clears FIFO (X Condition) and sets
STATUS to FULL.
92CZ26A-437
TMP92CZ26A

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