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SCHEMATIC DIAGRAM-1
A
MAIN 1/5 CIRCUIT
IORST
A(0-25)
D(0-31)
b
FDC.TC
R4
c
PMUT
4.7K
d
USB.SD
e
USB.ST
f
USB.MAITU
g
MIDI.TX
R3
h
1K
MIDI.RX
i
RMCOM
j
CP.CLK
k
CP.DATA
SD.CS
D1
R1
MA2J11100L
100
REAL.SDA
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
PSRT.EX3
TGCS
TGCS2
PORT.EX2
LCD.CS
SNS
TBC.SNS
TGS.INT1
USB.SOF
FOC.DRQ
IRQ0
SDC0
a
BUSCLK
b
LCD.WAIT
c
RE
d
WE3
e
WE2
+3.3D
Q1
R7
2SB0709ARL
100K
Q2
2SD0601AQL
C3
0.22
R8
R6
4.7K
1K
D3
MA2J11100L
A(0)
A(1)
+3.3D
+3.3D
A(2)
Z8 4.7Kx4
Z15 4.7Kx4
A(3)
8
4
A(16)
8
4
7
3
A(17)
7
3
A(4)
6
2
A(18)
6
2
A(5)
5
1
A(19)
5
1
A(6)
A(7)
8
4
A(20)
8
4
7
3
A(21)
7
3
A(8)
6
2
A(22)
6
2
A(9)
5
1
A(23)
5
1
A(10)
A(11)
Z17 4.7Kx4
Z9 4.7Kx4
A(12)
A(13)
Z11 4.7Kx4
A(14)
8
4
A(15)
7
3
6
2
A(16)
5
1
A(17)
A(18)
8
4
A(19)
7
3
6
2
A(20)
5
1
A(21)
A(22)
Z12 4.7Kx4
A(23)
A(24)
A(25)
+3.3D
C2
0.1
16
VCC
A(16)
7
7
A0
1
A(17)
9
6
A1
2
A(18)
10
5
A2
3
11
4
Y
CS2
4
12
3
CS3
5
13
2
CS1
6
14
1
15
0
IC1
GND
C0JBAN000098
8
R12
4.7K
R2
C1
100
100P
1
2
3
4
5
6
7
8
9
C4
0.1
10
11
12
13
14
15
16
17
18
19
C5
0.1
20
21
22
23
24
25
26
27
28
29
C6
0.1
30
31
32
33
34
35
36
37
38
39
40
+3.3D
5
D2
6
MA2J11100L
7
8
Z4 4.7K
R9
R11
A0
A1
A2
A3
VSS
A4
A5
A6
IC2
A7
MN103002A
VDD
(32bit MICRO-CONTROLLER)
A8
A9
A10
A11
VSS
A12
A13
A14
A15
VDD
A16
A17
A18
A19
VSS
A20
A21
A22
A23
VDD
A24
A25
A26/CS4/RAS4
A27/CS5
VSS
A28/CS6
A29
A30
A31/CS7
VDD
4
3
2
1
4.7K
4.7K
C8
0.1
R5
100K
+3.3D
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