Sanyo MCD-ZX700F Service Manual page 11

IC BLOCK DIAGRAM & DESCRIPTION
IC902 LC78622E(Degital Signal Processor)
Terminal Terminal
I/O
No. symbols
-
43 XVDD
Power terminal for crystal oscillator
O
44 XOUT
Joining terminal for crystal resonator (16.9344 MHz)
I
45 XIN
-
46 XVSS
Ground terminal for crystal oscillator. Make sure to ground.
O
47 SBSY
Output terminal for synchronizing signals of sub-code clock.
O
48 EFLG
Monitor terminal for 1 bit or 2 bit error correction
O
49 PW
Output terminal for sub-code P, Q, R, S, T, U or W.
O
50 SFSY
Output terminal for synchronizing signals of sub-code frame. When sub-code is stood by, falls.
I
51 SBCK
Input terminal for clock to read out sub-code. Schmitt input (when not used, make sure to ground.)
O
52 FSX
Output terminal for synchronizing signal (7.35 kHz) which is divided from crystal oscillator.
O
53 WRQ
Output terminal for Q output standby of sub-code.
I
54 RWC
Input terminal for read/write control. Schmitt input.
O
55 SQOUT
Output terminal for Q output of sub-code.
I
56 COIN
Input terminal for command from micro-computer.
Input terminal either for clock to take in command input or for clock to take out sub-code from SQOUT. Schmitt inpu
57 *CQCK I
I
58 *RES
Input terminal for reseting this LSI. Switches to "L" position for a moment at power-on.
O
59 TST11
Output terminal for test. Make sure to open circuit. (Normally "L" output)
O
60 16M
Output terminal of 16.9344 MHz
O
61 4.2M
Output terminal of 4.2336 MHz
I
62 TEST5
Input terminal for test. Pull-down resistor incorporated. Make sure to ground.
I
63 *CS
Input terminal for chip selecting. Pull-down resistor incorporated. Make sure to ground when not controlled.
I
64 TEST1
Input terminal for test. No pull-down resistor. Make sure to ground.
Note: Each power terminal (VDD, VVDD, LVDD, RVDD and XVDD) must be supplyed with the same voltage.
IC901 LA9241M(Servo Signal Processor)
Vcc1 LDS LDD BH1 PH1
64 63 62 61 60
APC
RF DET
FIN2 1
VCA
2
FIN1
I/V
3
E
BAL VCA
4
F
5
TB
TE
TE- 6
7
TE
8
TESI
T.SERVO & T.LOGICK
9
SCI
TH 10
11
TA
12
TD-
F.SERVO & F.LOGICK
TD 13
14
JP
TO 15
FD 16
17 18 19
FD- FA FA-
LF2 VR REF1 Vcc2 FSS DRF CE DAT CL CLK DEF
59 58 57 56 55 54 53 52 51 50 49
REF
MICOM
INTER FACE
SLC
RF Amp
SPINDLE SERVO
SLED SERVO
20 21 22 23 24 25 26 27 28 29 30 31
FE FE- AGND SP SPI SPG SP- SPD SLEQ SLD SL- SL+
DESCRIPTION
48 NC
47 TBC
46 FSC
45 DGND
44 SLI
43 SLC
RFS-
42
41 RFSM
40 CV+
CV-
39
38 SLOF
HFL
37
TES
36
35 TOFF
34 TGL
33 JP+
32
JP-
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