AC101
Reg.bit
Name
1.0
Extended Ca-
pability
R
2: PHY I
EGISTER
DENTIFIER
Reg.bit
Name
a
2.[15:0]
OUI
a. Based on an OUI of 0010A9 (Hex).
R
3: PHY I
EGISTER
DENTIFIER
Reg.bit
Name
a
3.[15:10]
OUI
3.[9:4]
Model Number
3.[3:0]
Revision Num-
ber
a. Based on an OUI of 0010A9 (Hex).
R
4: A
-N
EGISTER
UTO
The ANeg Complete bit of Register 1: Status Register (see "Register 1: Status Register" on page 25) must be set for this
register to be valid.
Reg.bit
Name
4.15
Next Page
4.14
Acknowledge
4.13
Remote Fault
4.[12:10]
Reserved
4.9
100BASE-T4
Page 26
MII-Specified Registers
Table 15: Register 1: Status Register (Cont.)
1 = Extended register capable. This bit is tied permanently to
one.
1 R
EGISTER
Table 16: Register 2: PHY Identifier 1 Register
Composed of the 3rd through 18th bits of the Organizationally
Unique Identifier (OUI), respectively.
2 R
EGISTER
Table 17: Register 3: PHY Identifier 2 Register
Assigned to the 19th through 24th bits of the OUI.
Six bit manufacturer's model number. 101 is encoded as
100001.
Four-bit manufacturer's revision number. 0011 stands for Rev.
C, etc.
A
EGOTIATION
DVERTISEMENT
Table 18: Register 4: Auto-Negotiation Advertisement Register
• 1 = Next Page enabled.
• 0 = Next Page disabled.
This bit will be set internally after receiving 3 consecutive and
consistent FLP bursts.
• 1 = Advertises that this device has detected a Remote Fault.
• 0 = No remote fault detected.
For future technology.
Technology not supported. This bit always 0
Description
Description
Description
R
EGISTER
Description
Br oad com
Preliminary Data Sheet
06/04/01
Mode
Default
RO
1
Mode
Default
RO
0022(H)
Mode
Default
RO
010101
RO
100001
RO
1011
Mode
Default
RW
0
RO
0
RW
0
RW
000
RO
0
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