Panasonic SDR-S45EG Service Manual page 62

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INITIAL/LOGO
CPDT
CPN
CPOB
CPRD
CPS
CPUADR
CPUADT
CPUIRQ
CPV
CPWR
CR OUT
CR POW SW
CRA
CRA
CRST
CS
CS 0-7
CSEL
CSI 0-7
CSYNCIN
CSYNCOUT
CTSW
CURR
CW
D
D CLK
D MODE
D01-03
DA UV SEL
DAC
DACCK
DAG
DB0-7
DCC
DCCNT
DCI
DCLR
DCP
DCS-CLK, DA
DC-STP1
DC-STP2
DCT
DCX7
DEEMP
DEMO
DEMP
DEMP
ABBREVIATIONS
CPU Data
Component Signal
Clamp Pulse for Optical Blanking
CPU Read Enable
Composite Signal
CPU Address Latch
CPU Address Data Bus
CPU Interrupt Request
Gate Scan Clock
CPU Write Enable
Pre Apature Out
Camera Remote Power ON Switch
Aperture Gain Control
Pre Apature Gain Control
Camera Reset
Chip Select
Chrominance Signal Out
Clock Phase Select
Chrominance Signal In
Composite Sync In
Composite Sync Out
Crosstalk Switch
Current
Clockwise
Digital Clock
Digital Mode Switch Signal
Zoom 01-03
D/A Convertor U/V Select
Digital Analogue Converter
D/A Converter Clock
Digital Analogue Ground
Microprocessor Data
DC Clamp Control
DC Control
Digital Channel Cording IC
Digital Clear
Digital Clamp Pulse
CAS & DV I/F Serial Clock
DCS Serial Start
DCS Serial Stop
Discrete Cosine Transform (Compression)
Serial Data
Deemphasis bit ON/OFF
Demodulation
A/D Convertor Empahsis Control
De-Emphasis
S-49

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