Figure 5-13 Synch Break Interrupt Control - Fujitsu F2MC-8FX Series User Manual

__interrupt void _LinUartRx(void)
{
if ((ssr & 0xE0) != 0) {
(Omitted)
} else if (ESCR_LBD == SET) {
ESCR_LBD = CLEAR;
(Omitted)
vSetLinFreerunTimersCompare(hTHEADER_MAX_IND);
ucLinStatus = LIN_WAIT_SYNCH_FIELD_START;
(Omitted)
T00CR1_IE = SET;
}
② Sync Byte
LIN slaves measure the baud rate using input capture in the sync Byte and perform
compensation after a synch break has been detected. In the sample software, 8/16-bit
complex timers are used as the input capture, and are set to both edges and free run mode. In
free run mode, when an edge is detected, the counter value is sent to the data register, and the
interrupt flag changes to "1", so the counter is not cleared, and the count operations continue
as is.
When the input capture interrupts are set to enabled and both edge detection, when an edge is
detected, an input capture interrupt is created. The timer value at both edges and the number
of overflows are measured, and the baud rate calculated and adjusted using interrupts at 8.
Input capture interrupt enabled

Figure 5-13 Synch break interrupt control

100
AN07-00200-03E
Error check
←Synch break detection
←Clear synch break detection flag
←Complex timer (FRT)
value set
 State transition:
Wait synch field start