Power Up And Reset - Nokia RH-66 Troubleshooting Manual

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Power Up and Reset

The UEMC ASIC controls the power up and reset. The baseband can power up in the
following ways:
• Pressing the Power button, which means grounding the PWRONX pin of the
UEMC
• Connecting the charger to the charger input
• Initiating the real-time clock (RTC) alarm (when the RTC logic has been
programmed to give an alarm)
After receiving one of the above signals, the UEMC counts a 20 ms delay and then enters
reset mode. The watchdog starts, and if the battery voltage is greater than Vcoff+, a
200 ms delay starts to allow references (etc.) to settle. After this delay elapses, the
VFLASH1 regulator enables. Then, 500 us later, the VR3, VANA, VIO, and VCORE enable.
The Power Up Reset (PURX) line holds low for 20 ms and is sent to the UPP. Resets are
generated for the MCU and the DSP. During this reset phase, the UEMC forces the
VCTCXO regulator on regardless of the status of the sleep control input signal to the
UEMC.
The FLSRSTx from the UPP is used to reset the flash during power up and to put the flash
in power down during sleep mode. All baseband regulators are switched on when the
UEMC is powered on. The UEMC internal watchdogs run during the UEMC reset state,
with the longest watchdog time selected. If the watchdog expires, the UEMC returns to
the power-off state. The UEMC watchdogs are internally acknowledged at the rising
edge of the PURX signal to always give the same watchdog response time to the MCU.
Figure 2 and Figure 3
mode.
Issue 1 03/2005
represent the UEMC start-up sequence from reset to power-on
©2005 Nokia Corporation
2115i/2116/2116i (RH-66)
Baseband Description and Troubleshooting
Company Confidential Page 7