Block Diagram; Main Block Diagram - Panasonic TH-55FX600M Service Manual

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9 Block Diagram

9.1.

Main Block Diagram

TUNER
Analog AV
Y
/ CVBS
Input
Y
(V)
Pb
R
Pb
Pr
L
Pr
Output
L/R in
R
L
Head Phone L/R
Head
Phone
HDMI2
DDC* > RTD2871
DDC* > RTD2871
DDC* > RTD2871
HDMI_2_HPD< RTD2871
HDMI_2_HPD< RTD2871
2871
HDMI2_5V_DET> RT
HDMI2_5V_DET> RTD2871
TD2871
HDMI1
DDC* > RTD2871
DDC* > RTD
D2871
HDMI_1_HPD< RTD2871
HDMI_1_HPD< RTD
D2871
HDMI1_5V_DET> RTD2871
HDMI1_5V_DET> RT
TD2871
HDMI3
DDC* > RTD2871
D2871
HDMI_3_HPD< RTD2871
2871
HDMI3_5V_DET> RTD2871
TD2871
ETHER
10/100M
100Base-TX
D3V3
Power SW
Bluetooth
SUB5V
USB
Power SW
USB-1
SUB5V
HDD-USB
Power SW
USB-2
(3.0 HDD)
For Wake up On Wireless (Euro)
IEEE802.11n
Wireless UNIT
LNB PREPARATION
(i.e NZ/ JPN MODEL)
P15V
LNB_SDA_R
LNB1
LNB_SCL_R
TS
Low IF
1.8/3.3V
1.8/3.3V
(DDR)
Silicon Lab
Silicon Lab
EMMC 1.8V
ST_A3V3
ST_A1V0
CPU_1V0
CPU_1V0
COR
CORE_1V0
D3V3
DDR1V5
IIC
VIDEO ADC
HDMI RX
VIDEO
R_VIN4P (B)
PROCESSING HW
R_VINYON)
A
ATV DEMOD
A A
AT
R_VIN3P (G)
DTV DEMOD
DT
Audio DAC
TP
Ext TP IN/Out
Ex
SPIDIF IN
S
Digital Audio Out
Digital Audio IN
Dig
I2S/SPDIF
Audio
(I2S/PCM)
ARC OUT
ARC OUT
Processing HW
Analog ADC IN
An
S
SIF Demod
Rx2
Rx2
HDMI2.0
HDMI2.0
HDCP2.2
HDCP2.2
6G
6G
USB PHY/MAC
US
ARC : HDMI2
ARC : HDMI2
R 1
Rx1
Rx1
HDMI2.0
HDMI2.0
GET PHY/MAC
GE
HDCP2.2
HDCP2.2
6G
6G
Rx3
Rx3
HDMI2.0
HDMI2.0
HDCP2.2
HDCP2.2
Peripherals
6G
6G
FLASH
(UART/I2C/DDC/SPI/CI/TP/
CONTROLLER/
GPIO/LD/PWM/TCON/INT/L
EMMC
DO/POR/SPI/CR/Timer)
DO
POR/
CONTR
CONTROLLER
HS40
HS400
400MHz
400M
z
Safety
(DDR)
(DDR
Circuit
D3V3
EM
EMMC3.3_1.8V
eMMC
eMMC
Temp Sensor
4GB
R_EMMC_CLK
<
KEY1
R_EMMC_CMD
R_EMMC_RST_N
<
KEY3
MMCDAT0-7
R_GPO014_LD_SPI1_SYNC>
RMIN
>
USB
R_GPIO_DEN <
LUMINANCE
REMOCON
Sensor
Reciever
AI_SENSOR
>
R_GPIO_79_USB_PWR0_SD_WP>
R_RTC_XO_USBOCD0<
R_TEST_04 >
R_ST_GPIO_22_5V_HDMI_MHL<
USB3.0-IF
STB5V
USB
Power SW
WOW_ON_IRQ <
< WOW_PWR_ON
> WOW_OVP
DDR3
DDR1V5
-2Gb(128x16) x 2 – EPR0 stage ASIA Only
x8bit
(2133MHz)
DDR3
DDR3
DD
DDR
DD
R
R
3
3
3
(2pcs DDR)
DDR3
-4Gb(256x16) x 2 – (TBD)
128x16
128x16
6
6
LV_1V5
D1V8
128x16
(1866MHz)
Video Processing
HW/ OSD HW/
PIF TCON
Panel
(VBy1/EPI/LVDS/
Compensation
mini-LVDS)
MEMC
RGB Full 10bit
BL_ON
BL_SOS
TVE
Video DAC
DRAM
Bus/
Audio DAC
Register
Audio Processing
Control
HW
Digital Audio Out
Bus
I2S/SPDIF
SCPU
GPU
Audio DSP
MD/Cache/CP
Video Engine
/SRAM/BIST
PLLs
Microcontroller/Standby LDO/ Standby
Peripherals(UART/I2C/PWM/Timer/Watch
Dog
Dog/Interrupt/DDC/CEC/CBUS)
DDC
BUS)
ST_A3V3
27 MHz
RESET
circuit
UART0_RX
UART0_TX
ST_A3V3
ST
Debug
Debug
Connector
CONTROL PANEL KEY
Main SW Soft Control
LED Information
EEPROM
Current
Limiter
G_LED_ON >
R_LED_ON >
21
LCD Panel
P15V
INX
LG
PANEL
PNV12V
Power
65 inch
PANEL_VCC_ON
DCDC
43/49/55 inch
VbyOne 8Lane
4byte Mode
2.94Gbps
For 4k2k x 1
HTPDN
<
LOCKN
<
VbyOne 8 Lane
>
<
LED Driver
LG
PWM TOUT
TCON
INX
TCON
KIV
Mplus mode0
Mplus mode1
MSE
Head Phone L/R
Preparation for
OPT
M+ models
Optical OUT
L
HDMI 2 (ARC OUT)
P15V
I2S(MCLK/LRCLK/BCLK/SDAT[1:0])
I2S AMP
XRST/#SOS/#AMP_MUTE
YDA176-QZ
(YAMAHA)
S3.3
I2S AMP
YDA176-QZ
(YAMAHA)
WOOFER PREPARATION
TH-55FX600M
Lch:10W
Rch:10W

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