1. Manuals
  2. Brands
  3. Actel Manuals
  4. Motherboard
  5. ProASIC3/E
  6. User manual

Actel ProASIC3/E User Manual

Starter kit
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
ProASIC3/E Starter Kit
User's Guide and Tutorial

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the ProASIC3/E and is the answer not in the manual?

Questions and answers

Related Manuals for Actel ProASIC3/E

Summary of Contents for Actel ProASIC3/E

  • Page 1 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 2 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel. Actel makes no warranties with respect to this documentation and disclaims any implied warranties of merchantability or fitness for a particular purpose. Information in this document is subject to change without notice.

  • Page 3: Table Of Contents

    ProASIC3/E Evaluation Board ........9...
  • Page 4 Actel Technical Support ........

  • Page 5: Introduction

    This user’s guide assumes: • You intend to use Actel Libero IDE software. • You have installed and are familiar with Actel Libero IDE v6.2 SP1 or later software. • You are familiar with VHDL. • You are familiar with PCs and Windows operating systems.

  • Page 7: Contents And System Requirements

    Contents and System Requirements This chapter details the contents of the ProASIC3/E Starter Kit and lists the power supply and software system requirements. Starter Kit Contents The starter kit includes the following: • ProsASIC3/E Evaluation Board • Libero IDE Gold •...

  • Page 9: Hardware Components

    Hardware Components This chapter describes the hardware components of the ProASIC3/E Evaluation Board. ProASIC3/E Evaluation Board Figure 2-1 on page 10 illustrates a top-level view of the ProASIC3/E Evaluation Board. The ProASIC3/E Evaluation Board consists of the following: • Wall mount power supply connector, with switch and LED indicator •...
  • Page 10 Full schematics are available on the Starter Kit Tutorial CD that is supplied with the Starter Kit. The schematics are also available for download from the Actel website. The electronic versions of the dedicated schematics can naturally be enlarged to a far greater degree than can be shown in the printed version of this manual or even in the electronic version of this manual, hence the interested reader is referred to the dedicated schematics to see the appropriate level of detail.

  • Page 11: Pll Parts/Usage On Proasic3

    A 9 V power supply is provided with the kit (Figure 2-2). There are many power supply components in the starter kit board to illustrate the many ways that differing voltage banks may be supported with ProASIC3 and ProASIC3E ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 12 Regulator Figure 2-2. Power Supply Block Diagram To use the ProASIC3/E Evaluation board with a wall mount power supply, use the switching brick power supply that is provided with the kit. The external +9 V positive center power supply provided to the board via connector J16 goes to a voltage regulator chip U11 on the evaluation board.
  • Page 13 Disconnect the jumper at JP10 on all boards. This jumper can be used to provide VJTAG to a downstream board or to some element in the design that you wish to supply with the VJTAG voltage used by the ProASIC3/E component. The shunt that is normally in this location can be safely stored across pins 11 and 12, or 9 and 10 of the J12 daughter card power supply connector.
  • Page 14 To determine if the board is a Rev3 board: A Rev3 Board is recognized by examining the front of the board and looking for the part number just beneath the large Actel corporate logo on the board top silk-screen. The part number will be A3PE-A3P-EVAL-BRD1 followed by REV3.

  • Page 15: Programming The A3Pe-A3P-Eval-Brd1 With A Flashpro3

    Programming the A3PE-A3P-EVAL-BRD1 with a FlashPro3 Programming the A3PE-A3P-EVAL-BRD1 with a FlashPro3 The base board used for all ProASIC3/E starter kits is the A3PE-A3P-EVAL-BRD1. In an A3PE-PROTO-KIT, the particular board is an A3PE-EVAL-BRD600-SKT. In an A3PE-EVAL-KIT, the board is an A3PE-EVAL-BRD600-SA. The only difference between these two is that the –SKT indicates that the board is fitted with an A3PE600-PQ208 part, which is mounted in a PQ208 screw-down socket.
  • Page 16 Gerbers and other board views as needed. Pictures of the layers of the board are also attached in Appendix C of this User’s Guide. For your convenience, high-resolution PDFs of these layers are also provided on the Starter Kit CD. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 17: Clock Circuits

    “Signal Layers” on page Clock Circuits The ProASIC3/E Evaluation Board has two clock circuits: a 40 MHz oscillator and a manual clock. 40 MHz Oscillator The 40 MHz oscillator on the board is a 10 ppm stability crystal module which will give good LVDS performance.

  • Page 18: Switches Device Connections

    To use the device I/O for other purposes, remove the jumpers. Table 2-2 · Switch Device Connections Switch Device Connections U8 Pin 68 U8 Pin 67 U8 Pin 66 U8 Pin 64 ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 19: Fpga - Lcd Interface

    The interconnection details between the FPGA and the LCD module are listed in Table 2-4 on page Table 2-4 · FPGA – LCD Interconnections FPGA Pin No. LCD Pin No. LCD Pin Name R / ~W (Read / ~Write) RS (Register Select) E (Enable) ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 20: Lcd Power Supply Circuit

    The LVDS signals are terminated on J40 and J41 connectors so that a standard patch cable can be used for doing loop- back testing. Refer to Figure 2-1 on page 10 of the PA3 evaluation board schematics for schematic representation of connector signal details. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 21 CAT-5E SECONDARY are reversed so as to allow a standard patch cable to check loopback on these LVDS signals. A 1-foot CAT5 standard patch cable supplied with the PA3 evaluation kit can be used for LVDS signals loopback. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 22 3. J41 – RJ45 connector is referred as CAT 5E SECONDARY connector Refer to the PCB layout, Figure 2-1 on page 10, for the location of J40 and J41 connectors on the PA3 Evaluation board. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 23: Setup And Self Test

    For Libero IDE software installation instructions, refer to the Actel Libero IDE / Designer Installation and Licensing http://www.actel.com/documents/install_ug.pdf. Guide: Hardware Installation FlashPro3 is required to use the ProASIC3/E Starter Kit. For software and hardware installation instructions, refer to FlashPro User’s Guide: http://www.actel.com/documents/flashpro_ug.pdf Testing the Evaluation Board Refer to “Test Procedures for Board Testing”...

  • Page 25: Description Of Test Design

    4-2. Aclr Data_select SW7_count mux2A[7:0] LED_Flashing Clock Clock Q[7:0] A[7:0] DATA_LED[7:0] Y[7:0] Aclr B[7:0] LED_Flashing_instance DATA_MUX count8 Clock Updown Updown Aclr Aclr Sload Sload Data[7:0] HexA[3:0] HexB[3:0] count8_instance Figure 4-2. Data Block Diagram ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 26 Manual clock (very useful for simulation) Select for DATA_BLOCK. It allows switching LED Press SW6 output between the counter and Flashing data. Change Hex Switch setting (U13 and Changes the loaded data for the eight-bit counter. U14) ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 27 The state diagram is shown in Figure 4-3. write1 setmode2 home1 setmode1 home2 clear2 warmup clear1 setfund Figure 4-3. LCD State Diagram ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 29: Lvds Signal Evaluation

    (e.g., 300 Mb/s data rate from 150 MHz clock). The output of the DDR registers is sent out using the LVDS I/O standard. The output data is looped back and received by the FPGA using LVDS receivers. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 30: Measurement Results

    LVDS signal across the 100 Ohm termination resistor at 300 Mb/s. Figure 5-2 shows that the eye height across the termination is about 275 mV which is well within the LVDS spec. Figure 5-2. LVDS Signal across RX Termination at 300Mb/s ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 31: Actel Vhdl Proasic3/E Design Flow

    Actel VHDL ProASIC3/E Design Flow This chapter introduces the design flow for VHDL using the Actel Libero IDE software suite. This chapter also briefly describes how to use the software tools and provides information about the sample design. Figure 6-1 shows the VHDL-based design flow.

  • Page 32: Design Entry

    Libero IDE. ModelSim for Actel is an OEM edition of Model Technology Incorporated (MTI) tools. ModelSim for Actel supports VHDL or Verilog, but it can only simulate one language at a time. It only works with Actel libraries and is supported by Actel.

  • Page 33: Design Implementation

    For more information on the tools described in the above section, refer to the Designer User’s Guide. Programming Program the device with programming software and hardware from Actel or a supported third party programming system. Refer to the Designer User’s Guide, Silicon Sculptor User’s Guide, and FlashPro User’s Guide for information about programming an Actel device.

  • Page 35: Quick Start Tutorial

    Quick Start Tutorial This tutorial illustrates a VHDL design for a ProASIC3/E starter kit board. The design is created in Actel Libero IDE v6.2. The steps involved are as follows: “Step 1 – Create a New Project” “Step 2 – Perform Pre-Synthesis Simulation”...
  • Page 36 Select your project Family, Die, and Package. For this tutorial, you can select ProASIC3E, the A3PE600 die, and 208 PQFP for the package (Figure 7-2), or select ProASIC3, the A3P250 die, and 208 PQFP for the package (Figure 7-3). Figure 7-2. Select A3PE600-PQ208 Figure 7-3. Select A3P250-PQ208 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 37 10. Name your profile, select a tool from the list of Libero IDE supported tools, and Browse to the Location of your tool. Click OK to return to the New Project Wizard. 11. After you have selected your tools, click Next to continue. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 38 Your Libero IDE project exists, but you must add code or source to the project, such as a schematic, an ACTgen core, or a VHDL entity or package file, before you can run synthesis. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 39 Data : in std_logic_vector(7 downto 0)); end count8; architecture behavioral of count8 is signal Qaux : UNSIGNED(7 downto 0); begin process(Clock, Aclr) begin if (Aclr = '1') then Qaux <= (others => '0'); ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 40 From the File menu, click Save. The design file counter appears in the Design Hierarchy. Libero IDE lists count8.vhd under HDL files in the File Manager, as shown in Figure 7-9. Figure 7-9. Design Hierarchy ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 41: Step 2 - Perform Pre-Synthesis Simulation

    Create Stimulus Using WaveFormer Lite WaveFormer Lite generates VHDL testbenches from drawn waveforms. There are three basic steps for creating testbenches using WaveFormer Lite and the Actel Libero IDE software: Import Signal Information ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 42 Click the mouse button. This draws a waveform from the end of the signal to the mouse cursor. The red state button on the button bar determines the type of waveform drawn. The cursor shape also mirrors the red state button. Move the mouse to the right and click again to draw another segment. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 43 Place At is the time at which the block will be pasted. The Insert and Overwrite radio buttons determine whether the paste block is inserted into the existing waveforms or overwrites those waveforms. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 44 20 MHz value for the Clock. Right-click the Clock signal to select it. Select Signal(s) <-> Clock(s) to create the clock signal (Figure 7-15). Figure 7-15. Create Clock Signal in Waveformer Lite ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 45 Figure 7-17. WaveForm Timing Diagram Click the HIGH state button before you start to draw the SW4 waveform. If you have not selected any other state buttons since you drew the clock waveform, you may continue. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 46 ModelSim. Alternatively, you can create a testbench using the HDL editor. To create a testbench using the HDL editor: From the File menu, select New. This opens the New File dialog box. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 47 Right-click Top.vhd in the Design Hierarchy tab and choose Organize Stimulus, as shown in Figure 7-20. Figure 7-20. Organize Stimulus Files The Organize Stimulus dialog box appears (Figure 7-21). Figure 7-21. Organize Stimulus Dialog Box ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 48 Figure 7-23. ModelSim Main Window Once the compilation completes, the simulator simulates for the default time period of 1000 ns and a Wave window, shown in Figure 7-24 on page 49, opens to display the simulation results. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 49: Step 3 - Synthesize The Design In Synplify

    Step 3 – Synthesize the Design in Synplify The next step is to generate an EDIF netlist by synthesizing the design in Synplify. For HDL designs, Libero IDE launches and loads Synplicity Synplify synthesizer with the appropriate design files. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 50 From the Project menu, select Implementation Options. This displays the Options for the Implementation dialog box, as shown in Figure 7-26 for A3PE600 and Figure 7-27 for A3P250. Figure 7-26. Options for Implementation Dialog Box-A3PE600 ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 51: Step 4 - Perform Post-Synthesis Simulation

    Click the Simulation icon in the Libero IDE Design Flow window, or right-click the Top.vhd file in the Design Hierarchy tab and select Run Post-Synthesis Simulation. This launches the ModelSim Simulator that compiles the source file and testbench. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 52: Step 5 - Implement The Design With Designer

    Step 5 – Implement the Design with Designer After creating and testing the design, the next phase is implementing the Design using the Actel Designer software. Click Designer Place-and-Route in the Libero IDE Design Flow window, or right-click Top.vhd in the Design Hierarchy tab and select Run Designer.
  • Page 53 Select A3P250 in the Die field and select 208 PQFP in the Package field. Accept the default Speed grade and Die Voltage and click Next. Use the default I/O settings and click Next. Use the default Junction Temperature and Voltage setup and click Finish. Figure 7-30. Device Selection Wizard—A3P250 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 54 See the Libero IDE or Designer online help for more information on the I/O Attribute Editor or MultiView Navigator. Figure 7-32. I/O Attribute Editor in MultiView Navigator Assign a pin number to all of the signals, then select Commit from the File menu and close the I/O Attribute Editor. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 55 Timer, set the timing constraints in Timer, analyze the static and dynamic power with SmartPower, and use the ChipPlanner to assign modules. Click the appropriate icon to access these tools. For more information on these functions, refer to the Designer or Libero online help. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 56 Figure 7-35. Layout Options Dialog Box 13. Click OK to accept the default layout options. This runs place-and-route on the design. The Layout icon turns green to indicate that the layout has successfully completed. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 57: Step 6 - Perform Timing Simulation With Back-Annotated Timing

    From the ModelSim menu, select Simulate > Run > Run All to execute the full simulation time defined in the testbench. Scroll in the Wave window to verify that the counter works correctly. Use the zoom buttons to zoom in and out as necessary. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 58: Step 7 - Generate The Programming File

    PC USB slot, connect the ribbon cable to the programming header on the target board, and turn on the power switch on the board. To set up FlashPro3: From the Actel FlashPro software File menu, click Connect. The FlashPro Connect to Programmer dialog box displays, as shown in Figure 7-38.
  • Page 59 In the Port list, select the USB port. The FlashPro3 programmer is connected as shown in Figure 7-39. Figure 7-39. Connect to Programmer Dialog Box for ProASIC3/E Devices In the Configuration list, select ProASIC3/E. Click Connect. A successful connection, or any error, appears in the Log window, as shown in Figure 7-40.
  • Page 60 Select the A3PE600 or the A3P250 from the Device list. If only one device is present in the chain, performing Analyze Chain will select that device automatically from the Device list. Loading the STAPL File The FlashPro3 programmer uses a STAPL (*.stp) file to program the device. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 61 The FlashPro Log window will display a message indicating that the software has successfully loaded, as shown in Figure 7-44. Figure 7-44. STAPL File Load Successfully Note: If your board has an A3PE600 device, you will see A3PE600 in the Device list. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 62 Programs security settings into the device. Displays the Device IDCODE, security settings, design name, checksum, DEVICE_INFO and FlashROM content that is programmed into the device. Programming the Device To program the device: In the Action list, select PROGRAM. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 63 If you have an A3PE600 device on board, you will see A3PE600 in the Device list. Verifying the Correct Programming To verify the device is programmed with the correct STAPL file: Load the STAPL file. In the Action list, click Verify. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 64 If you have an A3PE600 device on board, you will see A3PE600 in the Device list. Saving Your Log File All FlashPro3 results are displayed in the Log window. Save these results into a file. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 65 Select a directory, type in the file name, and click Save. The FlashPro software saves the file. Check Functionality of Tutorial Design After programming the device, you will see “ACTEL A3PE STARTER KIT” display on the LCD panel as well as flashing LEDs. There are 6 switches (SW) equipped with special functions.

  • Page 67: Test Procedures For Board Testing

    Test Procedures for Board Testing Overview This document defines the test procedure required to be carried out by the Actel designated manufacturer's testing facility on the ProASIC3/E Evaluation Board with silkscreen labeling A3PE-A3P-EVAL-BRD-1. This testing is specific to the socketed version of the board. All steps in the following enumerated test procedure should be followed in sequence for testing the board.
  • Page 68 Make sure that pin 1 of the FPGA is oriented correctly. (The Actel logo on the part should match the orientation of the Actel logo on the board just above the A3PE-A3P-BRD1 part number.) Take great care to make sure all pins are in correct alignment so that the FPGA is on a level plane parallel to the board.
  • Page 69 Remove the silicon from the socket and place it in the safe silicon holding area. 17. This concludes the testing of the board. Switch SW11 to the OFF position and remove the power connector from J18. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 71: A Pq208 Package Connections For A3Pe600 And A3P250 Devices

    ProASIC3E Flash Family FPGAs datasheet at www.actel.com/documents/PA3E_DS.pdf These datasheets are included on the ProASIC3 and ProASIC3E Starter Kit CD. However, the website should always be referenced for access to the most recent datasheet. ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 72: 208-Pin Pqfp

    208-Pin PQFP 208-Pin PQFP Figure A-1. 208-Pin PQFP Table A-1 · Device Connections for 208-Pin PQFP 208-Pin PQFP Pin Number A3PE600 Function A3P250 Function GNDQ GAA2/IO118PDB3 VMV7 IO118NDB3 GAB2/IO133PSB7V1 GAB2/IO117PDB3 GAA2/IO134PDB7V1 IO117NDB3 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 73 IO112NDB3 IO122PPB7V0 IO111PDB3 IO121PSB7V0 IO111NDB3 IO122NPB7V0 GFC1/IO110PDB3 GFC1/IO120PSB7V0 GFC0/IO110NDB3 GFB1/IO119PDB7V0 GFB1/IO109PDB3 GFB0/IO119NDB7V0 GFB0/IO109NDB3 COMPLF COMPLF GFA0/IO118NPB6V1 GFA0/IO108NPB3 CCPLF CCPLF GFA1/IO118PPB6V1 GFA1/IO108PPB3 GFA2/IO117PDB6V1 GFA2/IO107PDB3 IO117NDB6V1 IO107NDB3 GFB2/IO116PPB6V1 GFB2/IO106PDB3 GFC2/IO115PPB6V1 IO106NDB3 IO116NPB6V1 GFC2/IO105PDB3 IO115NPB6V1 IO105NDB3 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 74 GEC0/IO100NDB3 GEB1/IO103PPB6V0 GEB1/IO99PDB3 GEA1/IO102PPB6V0 GEB0/IO99NDB3 GEB0/IO103NPB6V0 GEA1/IO98PDB3 GEA0/IO102NPB6V0 GEA0/IO98NDB3 VMV6 VMV3 GNDQ GNDQ VMV5 GNDQ IO101NDB5V2 GEA2/IO97RSB2 GEA2/IO101PDB5V2 GEB2/IO96RSB2 IO100NDB5V2 GEC2/IO95RSB2 GEB2/IO100PDB5V2 IO94RSB2 IO99NDB5V2 IO93RSB2 GEC2/IO99PDB5V2 IO92RSB2 IO98PSB5V2 IO91RSB2 IO96PSB5V2 IO90RSB2 IO94NDB5V1 IO89RSB2 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 75 IO80RSB2 IO83NPB5V0 IO79RSB2 IO82NPB5V0 IO78RSB2 IO83PPB5V0 IO77RSB2 IO82PPB5V0 IO76RSB2 IO80NDB4V1 IO75RSB2 IO80PDB4V1 IO74RSB2 IO79NPB4V1 IO73RSB2 IO78NPB4V1 IO72RSB2 IO79PPB4V1 IO71RSB2 IO78PPB4V1 IO70RSB2 IO76NDB4V1 IO69RSB2 IO76PDB4V1 IO68RSB2 IO72NDB4V0 IO67RSB2 IO72PDB4V0 IO66RSB2 IO70NDB4V0 IO65RSB2 GDC2/IO70PDB4V0 IO64RSB2 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 76 VMV4 VMV2 PUMP PUMP GNDQ TRST TRST JTAG JTAG VMV3 GDA0/IO60NDB1 GDA0/IO67NPB3V1 GDA1/IO60PDB1 GDB0/IO66NPB3V1 GDB0/IO59NDB1 GDA1/IO67PPB3V1 GDB1/IO59PDB1 GDB1/IO66PPB3V1 GDC0/IO58NDB1 GDC0/IO65NDB3V1 GDC1/IO58PDB1 GDC1/IO65PDB3V1 IO57NDB1 IO62NDB3V1 IO57PDB1 IO62PDB3V1 IO56NDB1 IO58NDB3V0 IO56PDB1 IO58PDB3V0 IO55RSB1 GCC2/IO55PSB3V0 GCB2/IO54PSB3V0 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 77 GCC0/IO48NDB1 IO49NDB2V1 GCC1/IO48PDB1 IO49PDB2V1 IO47NDB1 IO48PSB2V1 IO47PDB1 IO47NDB2V1 IO46RSB1 IO47PDB2V1 IO45NDB1 IO44NDB2V1 IO45PDB1 IO44PDB2V1 IO44NDB1 IO43NDB2V0 IO44PDB1 IO43PDB2V0 IO43NDB1 IO40NDB2V0 GBC2/IO43PDB1 IO40PDB2V0 IO42NDB1 GBC2/IO38PSB2V0 GBB2/IO42PDB1 GBA2/IO36PSB2V0 IO41NDB1 GBB2/IO37PSB2V0 GBA2/IO41PDB1 VMV2 VMV1 GNDQ GNDQ ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 78 IO33RSB0 IO31NDB1V1 IO32RSB0 IO27PDB1V0 IO31RSB0 IO27NDB1V0 IO30RSB0 IO23PPB1V0 IO29RSB0 IO22PSB1V0 IO28RSB0 IO23NPB1V0 IO27RSB0 IO21PDB1V0 IO26RSB0 IO21NDB1V0 IO25RSB0 IO19PPB0V2 IO24RSB0 IO18PPB0V2 IO23RSB0 IO19NPB0V2 IO22RSB0 IO18NPB0V2 IO21RSB0 IO17PPB0V2 IO20RSB0 IO16PPB0V2 IO19RSB0 IO17NPB0V2 IO18RSB0 IO16NPB0V2 IO17RSB0 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 79 IO14RSB0 IO13NDB0V2 IO13RSB0 IO11PSB0V1 IO12RSB0 IO09PDB0V1 IO11RSB0 IO09NDB0V1 IO10RSB0 IO07PDB0V1 IO09RSB0 IO07NDB0V1 IO08RSB0 IO05PDB0V0 IO07RSB0 IO05NDB0V0 IO06RSB0 GAC1/IO02PDB0V0 GAC1/IO05RSB0 GAC0/IO02NDB0V0 GAC0/IO04RSB0 GAB1/IO01PDB0V0 GAB1/IO03RSB0 GAB0/IO01NDB0V0 GAB0/IO02RSB0 GAA1/IO00PDB0V0 GAA1/IO01RSB0 GAA0/IO00NDB0V0 GAA0/IO00RSB0 GNDQ GNDQ VMV0 VMV0 ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 81: B Board Schematics

    ProASIC3/E Evaluation Board. ProASIC3 Schematics The last pages of this appendix show the following illustrations of the ProASIC3/E Starter Kit Board in order. Figure B-3: Main 3.3 V, 2.5 V and 1.5 V Power...
  • Page 82 Figure B-1. Top-Level View of ProASIC3/E Evaluation Board ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 83 ProASIC3 Schematics Figure B-2. Bottom-Level View of ProASIC3/E Evaluation Board ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 84 Figure B-3. Main 3.3 V, 2.5 V and 1.5 V Power ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 85 ProASIC3 Schematics Figure B-4. ProASIC3 FPGA ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 86 Figure B-5. LED and LCD Module Interface Circuit ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 87 ProASIC3 Schematics Figure B-6. PushButton and Hex Switches ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 88 Figure B-7. FPGA Headers and Expansion Bus ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 89 ProASIC3 Schematics Figure B-8. Clocks Oscillators and Reset ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 90 Figure B-9. JTAG and JTAG DaisyChain Connector ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 91 ProASIC3 Schematics Figure B-10. Decoupling Caps, Test Points ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 92 Figure B-11. LVDS Signal Routing Via CAT-5E Connectors ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 93: C Signal Layers

    Layer 4 – Signal layer 4, used for LVDS transmit and other signals Layer 5 – Power plane Layer 6 – Bottom signal layer Refer to Figure C-1 on page 94 through Figure C-7 on page 100. ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 94 Figure C-1. Layer 1 – Top Signal Layer ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 95 Figure C-2. Layer 2 – Ground Plane (Blank) ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 96 Figure C-3. Layer 3 – Signal 3 (LVDS Receive Layer) ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 97 Figure C-4. Layer 4 – (LVDS Transmit Layer) ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 98 Figure C-5. Layer 5 – Power Plane (Blank) ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 99 Figure C-6. Layer 6 – Bottom ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 100 Figure C-7. Layer 6 – Bottom (Viewed from Bottom) ProASIC3/E Starter Kit User’s Guide and Tutorial...

  • Page 101: D Product Support

    Fax, from anywhere in the world 650.318.8044 Actel Customer Technical Support Center Actel staffs its Customer Technical Support Center with highly skilled engineers who can help answer your hardware, software, and design questions. The Customer Technical Support Center spends a great deal of time creating application notes and answers to FAQs.
  • Page 102 ., Pacific Time, Monday through Friday. The Technical Support numbers are: 650.318.4460 800.262.1060 Customers needing assistance outside the US time zones can either contact technical support via email (tech@actel.com) or contact a local sales office. Sales office listings can be found at www.actel.com/contact/offices/index.html.

  • Page 103: Index

    23 test bench exporting 44 test file LED device connections 17 programming 23 Libero IDE design flow Timer 55 design creation timing simulation 57 adding ACTgen macros 32 design capture 32 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 104 Index VHDL APA design flow 31 WaveFormer Lite 41 waveforms 42 web-based technical support 101 ProASIC3/E Starter Kit User’s Guide and Tutorial...
  • Page 106 Phone 650.318.4200 • Fax 650.318.4600 • Customer Service: 650.318.1010 • Customer Applications Center: 800.262.1060 Actel Europe Ltd. • River Court, Meadows Business Park • Station Approach, Blackwater • Camberley Surrey GU17 9AB • United Kingdom Phone +44 (0) 1276 609 300 • Fax +44 (0) 1276 607 540 Actel Japan •...

Table of Contents