Pioneer tuning fork Service Manual page 27

L D D Playback Circuit of CLD-900, N T S C L V / C D com­
patible player (Service Manual VRT-050)
The LDD sound signal is decoded by C D circuitry because
the L D D digital signal conforms to the C D format. Fig. 4
shows the simplified route of digital sound signal in the
circuitry of CLD-900.
DISC
LDDB
PICKUP
LPF
1.75MHz
HEAD
AMP
AMP EQUALIZER
PREB
AUDB
Analog
LPF
4MHz
Fig. 4 Block Diagram of Audio Signal Processing Circuit of CLD-900
Servo System
The revolution of the LD-spindle-motor is controlled by
L D spindle servo system which synchronizes reproduced
H sync with a reference signal while C D system syn­
chronizes reproduced frame sync with its reference signal.
The former system is more accurate t h a n the latter.
The LDD frame sync should also synchronize with its refer­
ence signal for correct sound reproduction. In the L D D
system, however, feeding the phase difference signal back
to the spindle motor should be avoided to prevent the sig­
nal from interferring the color signal.
CDDM
LDD signal
DE-EMPHASIS
AMP
LDD RF
ATC
CD signal
CD RF
BPF
AUDIO DEMODULATOR
2.3MHz
AGC
BPF
AUDIO DEMODULATOR
2.8MHz
AGC
The reproduced R F composite signal is amplified in H E A D
A M P and P R E B (Preprocessing b o a r d ) . The signal is am­
plified again and video and F M sound signals are removed
by 1.75MHz L P F in L D D B ( L D D board). The filtered
P C M RF(EFM) signal is then de-emphasized by R22, R23
and C17 and goes to C D D M (CD demodulator board).
Hereafter the L D D digital signal is processed in the same
way as C D signal. Refer to CD System, Vol. 7.
SYNC SEPARATION
DIGITAL/ANALOG
CORRECTION
EFM DEMODULATION
CONVERTOR
LPF
TRAP
WINDOW
COMP
CX DECODER
FROM CONT
AUDIO L SQ
LPF
TRAP
WINDOW
COMP
FROM CONT
AUDIO R SQ
To maintain the synchronization when an L D D disc is
played, the phase difference A P C O (Automatic phase con­
trol signal output) between the reference signal generated
in the player and the reproduced frame sync is applied from
Z7 (TC9178F-19(APCO), C D D M , to VCXO (voltage con­
trolled X ' t a l oscillator), not to the spindle motor. (Ref.
p61, SM VRT-050) The V C X O generates a clock signal for
controlling digital signal processing speed. The phase
difference signal controls the V C X O when L D D is played
and L D / C D signal becomes H . The pulse-width-modulated
A P C O signal is converted into voltage signal by Z5 2 / 2
(LPF). The jitter made by disc eccentricity is suppressed
by Z12 (LPF). Q8 turns on, and thus the A P C O controls
the V C X O . Refer to Fig. 5
DE-EMPHASIS LPF L-CH OUT
R-CH OUT
DE-EMPHASIS LPF
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