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(4) Baud rate generator mode control registers 0, 01 (BRGMC0, BRGMC01)
These registers set the UARTn source clock.
BRGMC0 and BRGMC01 are set by an 8-bit memory manipulation instruction.
RESET input sets these registers to 00H.
After reset: 00H
7
BRGMC01
0
After reset: 00H
7
BRGMC0
0
TPS03
TPS02
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Cautions 1. If write is performed to BRGMC0, BRGMC01 during communication processing, the output
of the baud rate generator will be disturbed and communication will not be performed
normally. Therefore, do not write to BRGMC0, BRGMC01 during communication
processing.
2. Be sure to set bits 3 to 7 of the BRGMC0 register to 0.
Remarks 1. Source clock of 8-bit counter: f
2. When the selected clock is the timer output, it is not necessary to set the P27/TI3/TO3 pin to timer
output mode.
292
CHAPTER 10
SERIAL INTERFACE FUNCTION
R/W
Address: FFFFF320H
6
5
0
0
R/W
Address: FFFFF30EH
6
5
0
0
TPS01
TPS00
0
0
0
External clock (ASCK0)
0
0
1
f
XX
0
1
0
f
XX
0
1
1
f
XX
1
0
0
f
XX
1
0
1
f
XX
1
1
0
f
XX
1
1
1
TM3 output
0
0
0
f
XX
0
0
1
f
XX
0
1
0
f
XX
0
1
1
f
XX
1
0
0
Setting prohibited
1
0
1
1
1
0
1
1
1
SCK
User's Manual U12768EJ4V1UD
4
3
0
0
4
3
0
0
TPS02
8-Bit Counter Source Clock Selection
/2
/4
/8
/16
/32
/64
/128
/256
/512
2
1
0
0
0
TPS03
2
1
0
TPS01
TPS00
m
−
0
1
2
3
4
5
−
6
7
8
9
–
–
–
–
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