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Quest Engineering SUPER ELF Manual

An 1802 based micro computer
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SUPER
ELF
AN 1802 BASED
MICRO COMPUTER
BY
QUEST
COPYRIGHT 1977 BY QUEST ELECTRONICS

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Summary of Contents for Quest Engineering SUPER ELF

  • Page 1 SUPER AN 1802 BASED MICRO COMPUTER QUEST COPYRIGHT 1977 BY QUEST ELECTRONICS...
  • Page 2 If you have any questions or problems with your SUPER ELF Write to: SUPER ELF QUEST ELECTRONICS P.O. Box 4430 Santa Clara, California 95054...

  • Page 3: Table Of Contents

    CONTENTS PAGE INTRODUCTION 1. Manual contents 2. External Connections OPERATION 1. Hardware Assignments 2. Controls Description 3. Indicators and Displays Description 4. Operation without the ROM Monitor 5. Operation with the ROM Monitor 6. Using Single Step/Slow Step LOGIC DESIGN DESCRIPTION 1.
  • Page 4 PAGE 5. Address Display 6. ROM/RAM Select 7. Load Mode APPENDIX A PARTS LIST AND ASSEMBLY INSTRUCTIONS 1. Parts List - Basic 2. Parts List - Optional Low Address Display 3. Parts List - Optional High Address Display 4. Parts List - Optional Memory Saver 5.

  • Page 5: Introduction

    Appendix A Contains parts lists and assembly instructions for the basic SUPER ELF and available options. Appendix B contains complete data sheets on both the 1802 CPU and the 1861 video graphics generator.

  • Page 6: Operation

    OPERATION 1. Hardware ASSIGNMENTS The SUPER ELF has been designed using the following hardware assignments. A. Video Display ON Op Code 62. B. Video Display OFF Op Code 62. C. HEX Keyboard Input OP Code 6C. D. HEX Display Output Op Code 64.

  • Page 7: Indicators And Displays Description

    8-bit data bus. The last key depressed is the least significant 4 bits of the 8-bit data word. 3. INDICATORS AND DISPLAYS DESCRIPTION The SUPER ELF has nine LEDS and two HEX displays (4 additional HEX displays are optional. A. The LEDS show:...

  • Page 8: Operation Without The Rom Monitor

    4. OPERATION WITHOUT THE ROM MONITOR A. Loading programs is done in the LOAD mode. If you have purchased the address display option, the address just loaded will be displayed along with the address contents. All loading must start at location 00 HEX.

  • Page 9: Operation With The Rom Monitor

    5. OPERATION WITH THE ROM MONITOR The SUPER ELF monitor allows us to do three things. Loading a program starting at any location. Examine any location in memory (including the monitor itself). Starting a program at any location. NOTE: This monitor only works with PAGE ZERO (the first 256 words of memory).

  • Page 10: Using Single Step/Slow Step

    6. USING SINGLE STEP/SLOW STEP The SUPER ELF has the ability to step through programs one machine cycle at a time. Execution is halted at the negative edge of the TPA signal in each machine cycle. At this point the CPU is in the process of executing the current instruction cycle.

  • Page 11: Logic Design Description

    LOGIC DESIGN DESCRIPTION 1. HEXADECIMAL KEYBOARD (Figure 1) The 16 push buttons of the HEX keypad are encoded into one HEX character using a CMOS 20 key encoder, 74C923. The keys are arranged in a 4x4 matrix. The encoder uses scanning to determine which key is depressed.

  • Page 12: Hexadecimal Keyboard

    Hexadecimal Keyboard Figure 1...
  • Page 13 2. CONTROL CIRCUITS G R S W (Figure 2) The 'G' button is the RUN control. The letter R was used for RESET and G was chosen as an indication of GO or RUN, Depressing the button causes the state of the Schmidt trigger NAND gate (U21) to change. The output goes low and is converted to a high using U5 as an inverter.

  • Page 14: Control Circuit G R S W

    Control Circuit G R S W Figure 2...
  • Page 15 The timing diagrams in the appendix should be consulted to determine specifically where the instruction execution has stopped. Note that there are at least two and sometimes three machine cycles per instruction. The 'G' button Schmidt trigger has a gated oscillator built into it which provides the slow step feature.

  • Page 16: Control Circuit M P I L

    Control Circuit M P I L Figure 3...

  • Page 17: Display Control

    4. DISPLAY CONTROL (Figure 4) This circuit logically decides when to enable the input latches of the display drivers. TPB and MRD along with either load of N2 are ANDed together to detect the execution of an output instruction and enable the displays.

  • Page 18: Display Control / Rom/Ram Select

    ROM/RAM Select Display Control Figure 4...

  • Page 19: Ram/Rom Memory

    6. RAM/ROM MEMORY (Figure 5) The RAM consists of two 2101 MOS memories organized as 256 words of 4 bits. Their address lines are in parallel to result in a memory organized as 256x8. The ROM is a TTL fusible link PROM organized as 32x8.

  • Page 20: Ram/Rom Memory

    RAM/ROM Memory Figure 5...

  • Page 21: State/Mode Display

    State/Mode Display Figure 6...

  • Page 22: Output/Data Display

    Output/Data Display Figure 7...

  • Page 23: Output/Data Display

    15ma to light the LED. The use of a 4049 eliminates the need for a series resistor since it is internally current limited to a safe value (with a 5v supply). Only one STATE or MODE led can be on at a time. However due to the persistence of vision, more than one STATE led may appear to be on when the CPU is in the run mode.

  • Page 24: Address Buffers/Latch

    Address Buffers/Latch Figure 8...

  • Page 25: Address Display

    10. ADDRESS DISPLAY (Figure 9) The address bus contents may be displayed using the optional displays. The displays and drivers are the same as the output/data displays. In this case the displays are always enabled so that they show what is on the address bus at any time.

  • Page 26: Address Display

    Address Display Figure 9...

  • Page 27: Power Supply / Memory Saver

    Power Supply/Memory Saver Figure 10...

  • Page 28: Video Generator / I/O Port Select / Q Circuit / Clock

    Video Generator Clock Generator I/O Port Decode Q Circuit Figure 11...

  • Page 29: Video Generator

    is on. The switch grounds the RAM select to prevent power transients from causing random memory writing during power on/off. The dotted lines show the V1.0 design. The V2.0 change revised the source of the charge current and the charging current was increased, D19 isolates the batteries from the power bus when it is off.

  • Page 30: Clock Generator

    16. CLOCK GENERATOR (Figure 11) The Clock Generator is a TTL and gate used as an inverting amplifier. R15 and Rt6 bias the TTL logic into the linear region. The third gate is used as a buffer to the divide by 2 flip flop. R14 is a pull up for TTL to CMOS logic shifting and C4 acts as a low pass filter to suppress overshoot.

  • Page 31: Expansion Bus

    Two unregulated power buses are supplied. One (No. 1) is part of the basic SUPER ELF, the other (No. 2) is part of the low address display option. Expansion bus current drain on No. 1 should be limited to less than 300 ma.
  • Page 32 the amount of current being drawn. 500 MFD to 1000 MFD on the input to the regulator is sufficient for the maximum allowable current. If more power is required, or other voltages, an auxiliary power supply is highly recommended. The signal out lines can drive at least one Low Power TTL or a number of CMOS loads.

  • Page 33: Expansion Bus Connections

    D4 (11) D3 (12) D2 (13) D1 (14) D0 (15) NOTES: 1. 1802 pin numbers shown in parenthesis where directly connected. 2. * Signifies special function for SUPER ELF expansion board. 3. N/C Means no connection FIGURE 12 EXPANSION BUS CONNECTIONS...

  • Page 34: Cpu Mode Control

    V TROUBLESHOOTING In case of trouble, recheck all IC's to be sure that they are in the correct location, are in the correct way and there are no bent under pins. The pin usually bends under so it is hidden and appears ok until the IC is pulled. Recheck for solder bridges using a magnifying glass.

  • Page 35: Video Display

    by depressing the reset and load buttons and then measuring the voltages on the output at U25. With F input to the keyboard, all four voltages should be above 3v. An end to end check from key pad to display is possible by entering the load mode and disabling the RAM.

  • Page 36: Component Layout V 1.0

    COMPONENT LAYOUT V 1.0 Figure 13...

  • Page 37: Component Layout

    COMPONENT LAYOUT V2.0 Figure 14...

  • Page 38: Board Wiring Pattern V 1.0 Front

    BOARD WIRING PATTERN V1.0 FRONT Figure 15...

  • Page 39: Board Wiring Pattern V 1.0 Back

    BOARD WIRING PATTERN V1.0 BACK Figure 16...

  • Page 40: Board Wiring Pattern V 2.0 Front

    BOARD WIRING PATTERN V 2.0 FRONT Figure 17...

  • Page 41: Board Wiring Pattern V 2.0 Back

    BOARD WIRING PATTERN V.2.0 BACK Figure 18...

  • Page 42: Power And Ground Connections

    POWER AND GROUND CONNECTIONS *U27 *U30 +U31 +U34 +U37 +U40 * = Bus M + = Bus B Figure 19...

  • Page 43: Appendix Aparts List And Assembly Instructions

    APPENDIX A PARTS LIST AND ASSEMBLY INSTRUCTIONS 1. PARTS LIST - BASIC TYPE NUMBER QTY DESCRIPTION INTEGRATED CIRCUITS 74L74/74LS74 Dual D Flip-Flop 74L00/74LS00 Quad 2-Input NAND Gate 4028 BCD-to-Decimal Decoder 4071 Quad 2-Input OR Gate 4011 Quad 2-Input NAND Gate 1802 COSMAC Microprocessor 4013...
  • Page 44 TYPE NUMBER QTY DESCRIPTION INTEGRATED CIRCUITS 4023 Triple 3-Input NAND Gate 4049 Hex Inverting Buffer 9368 Hex Decoder Latch Driver 4011 Quad 2-lnput NAND Gate 7805/340T-5 5V 1A Regulator 9368 Hex Decoder Latch Driver RESISTORS 200 OHM ¼ Watt Carbon Film 30 OHM ¼...
  • Page 45 TYPE NUMBER QTY DESCRIPTION CAPACITORS 1000 MFD 16V Electrolytic 0.1 MFD 50V Monolithic 220 PFD 100V Disc Ceramic 0.1 MFD 50V Monolithic 2.2 MFD 25V Tantalum 0.1 MFD 50V Monolithic 2.2 MFD 25V Tantalum 0.1 MFD 50V Monolithic 0.1 MFD 50V Monolithic 0.1 MFD 50V Monolithic...

  • Page 46: Parts List - Optional Low Address Display

    Low Profile - 20 Pin Socket Low Profile - 14 Pin Socket Low Profile - 16 Pin Socket Low Profile - Circuit Board SUPER ELF 2. PARTS LIST - OPTIONAL LOW ADDRESS DISPLAY TYPE NUMBER DESCRIPTION 7805/340T-5 5V 1A Regulator 9368...

  • Page 47: Parts List - Optional High Address Display

    TYPE NUMBER DESCRIPTION 1N4001 Silicon Rectifier 1N4001 Silicon Rectifier 1N4001 Silicon Rectifier 1N4001 Silicon Rectifier 1N4001 Silicon Rectifier - FND 500 ½" Seven Segment Display - 16 Pin Socket Low Profile - 24 Pin Socket Standard Or W.W - 6-32 x 3/8 Screw - 6-32 Lock washer - 6-32 Nut - Heat Sink...

  • Page 48: Parts List - Optional Accessories

    20 hrs minimum to 4 weeks minimum. 5. PARTS LIST - OPTIONAL ACCESSORIES - 44 Pin PC connector for expansion Bus - 50 Pin Ribbon cable connector for SUPER ELF Expander Board - Video modulator kit - 5101L Rams - Custom hardwood case and front panel 6.
  • Page 49 Referring to the component identification on the board and figure 2, component layout, start assembly using the following steps. NOTE: If you purchased options with your SUPER ELF, they can be added now or later. We recommend adding them now by doing all corresponding steps at one time.
  • Page 50 snug against the board. Before soldering the remaining pins, check to be sure the socket is seated on the board properly. SOLDER all the remaining pins. ( ) B. Install all the resistors. SOLDER. Trim off excess leads. Note: Pre- bending resistors to a lead spacing of 0.4 inch with a lead bender will simplify this job.
  • Page 51 ( ) J. Install the 6, 4 key, key switches.* CAREFULLY straighten any bent leads so that they are nearly straight. (Over bending can cause breakage and they need not be perfect for installation). Position the switch over the holes with one end closer to the board and, using a thin screwdriver or other blade, gently push the leads into the holes one set at a time, moving from one end to the other.

  • Page 52: Assembly Instructions - Low Address Display

    (Pins 6 and 7, 18 and 19, of the 24-pin socket are not used by the displays.) ( ) P. This completes the basic SUPER ELF. 7. ASSEMBLY INSTRUCTIONS LOW ADDRESS DISPLAY OPTION Refer to corresponding steps in the basic assembly instructions for more details.

  • Page 53: Initial Checkout

    If you fail to obtain the proper response, refer to the sections on troubleshooting and logic design. Or, if you wish, return your SUPER ELF and we will replace any defective parts without charge. Charges will be made for any parts damaged through improper assembly, etc.
  • Page 54 Push the RESET button and verify: (1) The R LED is lit. (2) The 1 LED is lit. Push the RUN button and verify: (1) The G LED is lit. (2) The 1 LED is lit. (3) The 0 LED may be lit depending upon the contents of memory. Push the WAIT button and verify: (1) The W LED is lit.
  • Page 55 Push the MEMORY PROTECT button and the INPUT button and verify: Location 0002 contains 23. Push RESET, MONITOR SELECT, LOAD, and INPUT buttons in that order and verify: Location 0000 contains F8 Continue pushing the INPUT button to read out the contents of the Monitor.
  • Page 56 ( 24-36 hours are required for a full charge ). This completes the initial checkout of your SUPER ELF. Additional operational information is contained in Section II. NOTE: If you have low line voltage (117 vac), it may be necessary to short out one or two of the series diodes D14, D16.

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