Renesas mPD179327 Subseries User Manual page 143

Segment Signal
Common Signal
V /V
LC0 SS0
Segment Signal
Common Signal
Select signal level V
Deselect signal level V
Figure 10-6 shows the common signal waveforms, and Figure 10-7 shows the voltages and phases of the common
and segment signals.
COM0
(Static display)
T: One LCD clock period
COMn
(Four-time slot mode)
T: One LCD clock period
CHAPTER 10 LCD CONTROLLER/DRIVER
Table 10-5. LCD Drive Voltage
(a) Static display mode
Select Signal Level
–V /+V
LCD LCD
(b) 1/3 bias method
Select Signal Level
/V –V /+V
LC0 SS0 LCD LCD
1 1
/V – V /+
LC2 LC1 LCD
3 3
Figure 10-6. Common Signal Waveforms
(a) Static display mode
T = T
F
T : Frame frequency
F
(b) 1/3 bias method
= 4 × T
T
F
T : Frame frequency
F
User's Manual U16995EJ2V0UD
V /V
SS0 LC0
0 V/0 V
V /V
SS0 LC0
–
V –
LCD
Deselect Signal Level
V /V
LC0 SS0
Deselect Signal Level
V /V
LC1 LC2
1 1
V /+ V
LCD LCD
3 3
1 1
V /+ V
LCD LCD
3 3
V
LC0
V
LCD
V
SS
V
LC0
V
LC1
V
LCD
V
LC2
V
SS
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