C28X Cpu - Texas Instruments C28 Series Student Manual

C28x CPU

C28x CPU
The C28x is a highly integrated, high performance solution for demanding control applications.
The C28x is a cross between a general microcontroller and a digital signal processor, balancing
the code density of a RISC chip and the execution speed of a DSP with the architecture,
firmware, and development tools of a microcontroller.
The DSP features include a modified Harvard architecture and circular addressing. The RISC
features are single-cycle instruction execution, register-to-register operations, and modified
Harvard architecture. The microcontroller features include ease of use through an intuitive
instruction set, byte packing and unpacking, and bit manipulation.
32 32-
32-bit
Auxiliary Auxiliary
Auxiliary
Registers Registers
Registers
Realtime Realtime
Realtime
JTAG JTAG
JTAG
The C28x design supports an efficient C engine with hardware that allows the C compiler to
generate compact code. Multiple busses and an internal register bus allow an efficient and
flexible way to operate on the data. The architecture is also supported by powerful addressing
modes, which allow the compiler as well as the assembly programmer to generate compact code
that is almost one to one corresponded to the C code.
The C28x is as efficient in DSP math tasks as it is in system control tasks that typically are
handled by microcontroller devices. This efficiency removes the need for a second processor in
many systems.
The C28x is one of several members of the fixed-point generations of digital signal processors
(DSPs) in the TMS320 family. The C28x is source-code and object-code compatible with the
C27x. In addition, the C28x is source code compatible with the 24x/240x DSP and previously
written code can be reassembled to run on a C28x device. This allows for migration of existing
code onto the C28x.
1 - 4
C28x CPU
Program Bus Program Bus
R - M - W
- bit bit R - M - W
R-M-W
32x32 bit
32x32 bit
32x32 bit
Atomic
Atomic
Atomic
Multiplier
Multiplier
Multiplier
ALU
ALU
ALU
Register Bus
Register Bus
CPU CPU
Data Bus
Data Bus
C28x CPU
MCU/DSP balancing code density
MCU/DSP balancing code density
& execution time.
& execution time.
Supports 32
Supports 32
for improved execution time;
for improved execution time;
Supports 16
Supports 16
for improved code efficiency
for improved code efficiency
32 32 - - bit fixed bit fixed
PIE
PIE
Interrupt Interrupt
32 x 32 bit fixed 32 x 32 bit fixed
Manager
Manager
Dual 16 x 16 single
Dual 16 x 16 single
point MAC (DMAC) point MAC (DMAC)
3 3
3
32 - /64 - bit saturation
32 - /64 - bit saturation
32 bit 32 bit
32 bit
Timers Timers
64/32 and 32/32 modulus division
64/32 and 32/32 modulus division
Timers
Fast interrupt service time
Fast interrupt service time
Single cycle read Single cycle read
instructions
instructions
Unique real Unique real
capabilities
capabilities
Upward code compatibility Upward code compatibility
- bit instructions
- bit instructions
- bit instructions
- bit instructions
- - point DSP point DSP
- - point MAC point MAC
- cycle fixed -
- cycle fixed -
- - modify modify - - write write
- - time debugging time debugging
C28x - Architecture Overview