Endace DAG 9.2X2 User Manual
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Endace DAG 9.2X2 User Manual

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DAG 9.2X2 Card User Guide
EDM01-36

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  • Page 1 DAG 9.2X2 Card User Guide EDM01-36...
  • Page 2 In accordance with the Endace Technology Limited policy of continuing development, the information contained herein is subject to change without notice. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 3: Table Of Contents

    Display Current Configuration ......................23 dagconfig tokens explained ......................... 25 dagconfig options ..........................33 Viewing the DAG card status ........................34 Interface Status ..........................34 Universal counters ..........................35 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 4 Selecting stream buffer size ........................71 Burst duration ............................. 71 Latency .............................. 72 Multiple streams ............................ 72 Calculating the stream buffer size ......................72 Example 1 ............................73 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 5 Requesting assistance ........................... 76 Support script ............................ 76 Required Information ......................... 76 Severity Levels Described ........................77 Support request form ......................... 77 Contact details ........................... 77 Version History ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 7: Introduction

    EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction Introduction The Purpose of this User Guide The purpose of this user guide is to provide you with an understanding of the Endace DAG 9.2X2 card architecture, functionality and to guide you through the following: Installing the card software.

  • Page 8: Overview

    EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction Overview The Endace DAG 9.2X2 is a two port, PCIe Gen 2.0 card designed for capture and transmission of network traffic. It transfers data at the full speed of the network into the memory of the host computer, with zero packet loss in even worst-case conditions.

  • Page 9: System Requirements

    Endace Customer Support at support@endace.com. Warning - thermal trip In order to prevent damage to the DAG 9.2X2 card, the DAG 9.2X2 card has an emergency thermal response function (thermal trip). Should the internal temperature of the DAG 9.2X2 card exceed 85 ºC (185 ºF) or fall below 0 ºC (32 ºF), the FPGA will be unloaded, causing the power utilization of the DAG...

  • Page 10: Card Description

    SFP+ transceivers are also backwards compatible with standard SFP interfaces in 1GE mode. Note: Performance will be reduced if the DAG 9.2X2 card is inserted in a PCIe Gen 1.0 slot, or if the 8 lane bus has less than 8 lanes connected. Please check the host computer motherboard specifications. Note:...

  • Page 11: Card Architecture

    Line types It is important that you understand the physical characteristics of the network to which you want to connect. If your configuration settings do not match your network, the DAG 9.2X2 card will not function as expected. There are various Ethernet line speeds and corresponding protocols which are identified using the IEEE naming convention.

  • Page 12: Extended Functions

    For further details refer to the following documents: EDM04-30 dagfilter-loader Software Guide • EDM04-31 Enhanced Packet Processing v2 • EDM04-35 dagcat-setup Software Guide v2 • ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 13: Inline Forwarding

    EDM01-36v10 DAG_9.2X2_Card_User_Guide - Introduction Inline forwarding The DAG 9.2X2 card supports inline forwarding which enables the card to receive and transmit packets directly from a single memory buffer. This allows you to forward packets from the DAG card receive interface(s) to the DAG cards transmit interface(s) without the requirement to copy them. Using inline forwarding you can receive, inspect, filter and forward packets between ports.

  • Page 15: Installation

    • PCIe Gen 2.0 Slot The DAG 9.2X2 card operates on an 8 lane PCIe Gen 2.0 bus and can be installed in any free 8 lane PCIe Gen 2.0 slot. The PCIe Gen 2.0 bus architecture allows multiple DAG cards to be installed without affecting the bandwidth used by each DAG 9.2X2 card.

  • Page 16: Inserting The Dag Card

    Securely attach the clip on the other end of the strap to a solid metal area on the computer chassis as shown below. Hold the DAG 9.2X2 card with one hand on the front bracket and two or three fingers on the card edge. This ensures damage does not occur to the card or its components.

  • Page 17: Ports And Status Leds

    Connect only a P P S input to the 4 pin tim e synchronization sock et. Connecting anything else to this sock et m ay dam age the DAG card. Boot jumper settings The DAG 9.2X2 has two sets of jumpers mounted on the DAG card which control the card's boot behavior: •...

  • Page 18: Boot Leds

    Color Green Green Green Notes: If the blue 'FPGA programmed' LED (on the front of the DAG card) is off or flashing - contact Endace • Support. If the red Boot LED is flashing, contact Endace Support. • ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 19: Pluggable Optical Transceivers

    TXR-10G 1550 10GBASE-ER 1260 1600 -15.8 1530 1565 -4.7 SM SFP+ Single mode Transmit power and the receive sensitivity is specified as OMA - Optical Modulation Amplitude. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 20: Power Input

    Note: Endace recommends that you do not use a combination of single-mode and multi-mode fibers and optics modules on the same link, as the quality of the received signal cannot be guaranteed. If you have no choice but to mix single-mode and multi-mode, please be aware that a single mode input connected to a multi-mode fiber will have some attenuation but may still be acceptable.

  • Page 21: Configuring The Dag Card

    For further details on DAG tools, see Accessing DAG tools in Windows (page 16). Note: Depending on your current network's mode, you may need to change the network mode settings. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 22: Differences Between Windows And Linux Installs

    DAG tool outputs. • automatically displays details about the installed DAG cards. • Note: The DAG tools use the Unix style operands, i.e. they use "-" instead of "/". ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 23: Before Configuring The Dag Card

    DAG card, and install DAG drivers for each installed DAG card. Configuring DAG card parameters EDM04-37 Windows DAG For further details, refer to the section in Software Installation Guide ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 24: Daginf

    Displays the name of a specified DAG card in a form suitable for use as a filesystem path (i.e. no whitespace). Implies '--name'. -v,--verbose Increase verbosity. -V,--version Display version information. Note: Dagdetect runs automatically each time the WinDAG Command Prompt window opens. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 25: Setting Up The Fpga

    By default, the DAG 9.2X2 card boots using the user image in slot 1, unless the Force Factory jumper is fitted. For more details on the Force Factory jumper, see Boot jumper settings (page 11).

  • Page 26: Selecting The Firmware Image To Load At Power Up

    -d0 -q3 Loading new firmware images onto a DAG Card New DAG card firmware images are released regularly by Endace as part of software releases. They can be downloaded from the Endace website at https://support.endace.com/. Endace recommends you use the...

  • Page 27: Dagrom

    EDM01-36v10 DAG_9.2X2_Card_User_Guide - Configuring the DAG card dagrom is a software utility to configure the FPGA on Endace DAG cards. The following table lists dagrom dagrom options. Option Description -a,--alternate-half Use alternate (stable) half. [Default is current half.] Factory / User.

  • Page 28: Preparing The Dag Card For Use

    Ensure you do this each time the FPGA is reprogrammed. dagconfig -dX default (Where X is the device number of the DAG card you want to configure). The current DAG 9.2X2 configuration displays and the firmware is verified as correctly loaded. See dagconfig (page 33) for more information.

  • Page 29: Dag Card Configuration And Status

    PCI Burst Manager: PCI-e 2.0 x8 (32Gbs) buffer_size=1024 rx_streams=32 tx_streams=1 drop nooverlap Memory Streams: mem=48:512:48:0:48:0:48:0:48:0:48:0:48:0:48:0:48:0:48:0:0:0:0:0:0:0:0:0:0:0:0:0:0: 0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 TERF: terf_strip32 rx_error_a: off rx_error_b: off time_mode: no_time_mode Hash Load Balancer: hat=0.0-100.0 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 30 PCI Burst Manager: PCI-e 2.0 x8 (32Gbs) buffer_size=1024 rx_streams=32 tx_streams=1 drop nooverlap Memory Streams: mem=48:512:48:0:48:0:48:0:48:0:48:0:48:0:48:0:48:0:48:0:0:0:0:0:0:0:0:0:0:0:0:0:0: 0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 TERF: terf_strip32 rx_error_a: off rx_error_b: off time_mode: no_time_mode Hash Load Balancer: hat=0.0-100.0 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 31: Dagconfig Tokens Explained

    Sets the DAG card into 1000BaseTX (1GE) mode. Ex am ple dagconfig 1000 Sets the DAG card into the 10G receive mode. Ex am ple dagconfig 10G Note: may be used interchangeably. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 32: Auto_Neg / Noauto_Neg

    -dX default dagclock (Where X is the device number of the DAG card you want to configure). Ex am ple dagconfig -d0 default ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 33: Drop/Nodrop

    FCL retransmits the data received and also send it to the host. Ex am ple dagconfig fcl dagconfig nofcl ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 34: Hash Load Balancer

    Defines whether the data transmitted is clocked with the recovered clock from the input (Slave) or if it uses the synthesized reference clock on the card (Master). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 35: Mem

    See also relative (page 30), time_mode (page 32). Ex am ple dagconfig nodelay ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 36: Overlap/Nooverlap

    The previous version of Relative Mode was port independent and you will see a different release • pattern transferring old files. The relative placement of the packets is accurate to ± 100ns. • ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 37: Reset

    TERF option. Note: Only displayed if the DAG card supports transmit (i.e. has a TERF image). Ex am ple dagconfig terf_strip32 dagconfig noterf_strip ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 38: Time_Mode

    Details the following information about the connected DAG card: Firmware image programmed in the FPGA. • • The DAG card serial number. • The MAC address(s) of the DAG card's ports (Ethernet cards only). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 39: Dagconfig Options

    Verbosity levels from 0=(basic / default) to 3=(full). N ote: Some images may not contain extended statistics. --framerfirmware <framer- DAG 9.2X2 only. Specifies the path to the framer firmware image. Allows firmware> you to override the default path to the framer firmware. -G,--getattribute Gets individual attributes by attribute name.

  • Page 40: Viewing The Dag Card Status

    Indicates oof has been asserted for more than 3ms. WAN mode only. Indicates loss of frame. 1GE mode only. Auto neg complete Auto negotiation process has completed, Only applicable when using copper transceivers. 1GE only. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 41: Universal Counters

    When the transmit ERF stream contains 10 ETH and 10 POS packets and sends that on a Ethernet Link only the Ethernet packets will be transmitted. The POS packets are discarded and counted. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 42 This "late" release is noted by the DAG card and each event increments the late release counter. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 43: Using Your Dag Card

    CTRL+C By default, runs indefinitely. To stop, use . You can also configure to run for dagsnap dagsnap a fixed time period then exit. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 44: Dagsnap

    3. The rate at which data is currently being written. -V, --version Display version information. -w,--wait Delay(wait) in seconds before capture and after the stream is initialized <waitseconds> ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 45: Capturing Data At High Speed

    Windows. Detecting packet drops Once the buffer fills, any new packets arriving will be discarded by the DAG 9.2X2 card until some data is read out of the buffer to create free space. You can detect any such losses by observing the Loss Counter (...

  • Page 46: Viewing Captured Data

    ERF header fields and packet contents are displayed as a Hex dump • dagbits only. To decode higher level protocols, Endace recommends using a third party application, see Using third party applications (page 47). is also able to run a number of tests, including monotonic time-stamp increment and frame •...
  • Page 47 --erase_pad Erase padding bytes from print function. --hlb-range <min- Steer hlb (hash load balance) range test range, for example: 15.0-50.0 max> --no_pad Turn off pad record flushing. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 48: Dagbits Tests

    Set ATM network interface to NNI (default UNI). --tcp_ip_counter Print TCP Flow and IP Address Counter ERF records. dagbits tests The following tests are available for use. Tests not listed in the following table are for Endace dagbits use only. Test Description decode Decode and print IP, TCP, UDP and ICMP headers.

  • Page 49: Converting Captured Data

    Legacy Ethernet files (input only). Legacy PoS files (input only). null Produces no input or output. pcap pcap(3) format file (input or output). ASCII text packet dump (output only). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 50 DLT types (case insensitive): dagconvert DLT type Description EN10MB Ethernet DOCSIS Ethernet CHDLC HDLC PPP_SERIAL HDLC FRELAY HDLC MTP2 HDLC ATM_RFC1483 ATM, AAL5 SUNATM ATM, AAL5 IPV4, IPV6 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 51 Once a new current outfile is created change the file name extension name to .erf. -u 4|6 Specify the output ERF type IPv4/IPv6 for DLT_RAW when converting pcap DLT_RAW to ERF.. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 52 This sets the pcap data link type to be used for BPF filtering (-b) and for pcap output. Previously only one DLT was mapped to each ERF type. See above table (page 44) for a list of supported DLT types (case insensitive). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 53: Using Third Party Applications

    The operating system does not recognize the DAG 9.2X2 card as a network interface and will not respond to ARP, ping, or router discovery protocols. The DAG 9.2X2 card will only transmit packets that are explicitly provided by the user. This allows you to use the DAG 9.2X2 card as a simple traffic load generator.

  • Page 54: Trace Files

    If you do not have any ERF trace files available, you can use to generate trace files containing daggen simple traffic patterns. This allows the DAG 9.2X2 card to be used as a test traffic generator. EDM04-06 Daggen User Guide For further information on using...
  • Page 55 1MB to achieve the highest transmit data rate. During testing Endace found a value of 16MB (16777216) to be effective. This reduces the possibility of a buffer under-run occurring if insufficient data is committed in a burst and the process is not scheduled by the OS to run in a timely manner.

  • Page 57: Synchronizing Clock Time

    For more information on the Time Distribution Server, refer to the section at http://www.endace.com. IRIG-B EDM04-33 For information on synchronizing the DAG 9.2X2 with an IRIG-B device, please refer to dag_irigb Software Guide ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 58: Network Time Protocol

    The best synchronization is achieved when the DAG card is synchronized to an external GPS reference clock, and the computer clock is synchronized to a local NTP server. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 59: Timestamps

    In this way the interpretation of the timestamp does not need to change when higher resolution clock hardware is available. The DAG 9.2X2 implements the 28 most significant bits which provides a time resolution of 7.5 nanoseconds.

  • Page 60: Readable Duck

    EDM01-36v10 DAG_9.2X2_Card_User_Guide - Synchronizing clock time Readable DUCK The DAG 9.2X2 firmware images allow the user to read the current time directly from the DUCK clock. This can be useful for verifying clock synchronization. To check if a firmware image supports reading the DAG clock time, check if the output from the following command includes the information about the version.

  • Page 61: Dagclock

    Wait for duck to sync before exiting. Note: By default, all DAG cards listen for synchronization signals on their RS-422 port, and do not output any signals to that port. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 62 Thu Apr 28 13:32:45 2007 host Thu Apr 28 14:35:35 2007 Thu Apr 28 14:35:35 2007 Note: For a description of the output see Dagclock output explained (page 57). dagclock ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 63 Highest absolute value of the Phase error since statistic collection began. Reset to zero when statistics are reset, see Dagclock Statistics reset. (page 56) Ex am ple error Freq -30ppb Phase -60ns Worst Freq 75ppb Worst Phase 104ns ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 64 No active input - free running. Ex am ple start Thu Apr 28 13:32:45 2007 host Thu Apr 28 14:35:35 2007 Thu Apr 28 14:35:35 2007 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 65: Card With Timing Reference

    This is derived directly from an external reference source or distributed through the Endace Time Distribution Server which allows two or more DAG cards to use a single Time Reference Source. For details on the available Time Distribution Server see Common Synchronization (page 51).

  • Page 66: Single Card No Reference

    Total 87039 Bad 0 Singles Missed 0 Longest Sequence Missed 0 start Wed Apr 27 14:27:41 2007 host Thu Apr 28 14:38:20 2007 Thu Apr 28 14:38:20 2007 ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 67: Two Cards No Reference

    Wed Apr 27 14:27:41 2007 host Thu Apr 28 14:59:14 2007 Thu Apr 28 14:59:14 2007 Note: The slave DAG card configuration is not shown, the default configuration is sufficient. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 68: Connector

    TX PPS- TX SERIAL+ RX SERIAL+ TX SERIAL- RX SERIAL- Note: This wiring is the same as an Ethernet crossover cable (Gigabit crossover, All four pairs crossed). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 69 Ethernet RJ45 PPS signal cable into your DAG card. The 4-pin to RJ45 adaptor pin assignments are shown below: RJ45 socket Signal name 4 Pin plug PPS Out+ PPS Out- PPS In+ PPS In- ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 71: Data Formats

    ERF records, and has no file header or trailer. This allows for simple concatenation and splitting of files to be performed on ERF record boundaries. ERF records have generic headers, and optional extension headers. The DAG 9.2X2 does not by default provide extension headers to the user.

  • Page 72: Generic Erf Header

    PCIe Gen 2.0 bus. The loss is recorded between the current record and color field the previous record captured on the same stream/interface. The is explained under the appropriate ERF type details. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...
  • Page 73 Reserved for Co Processor Development Kit (CDK) Users and Internal use TYPE_PAD Pad Record type Note: The Ethernet frame begins immediately after the pad byte so that the layer 3 (IP) header is 32-bit aligned. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 74: Erf 2. Type_Eth

    The Ethernet frame begins immediately after the pad byte so that the layer 3 [IP] header is 32- (1 byte) bit aligned. Payload Payload = rlen - ERF header (16 bytes) - Extension headers (optional) - Padding (2 bytes) (bytes of record) ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 75: Extension Headers (Eh)

    The following diagram shows presence of an Extension Header in addition to the ERF record. The following diagram shows presence of two Extension Headers with Bit 7 of the first Extension Header set to '1'. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 77: Guidance For Stream Buffer Sizing

    Applications writing data to disk can experience large delays when waiting for disk writes to complete. A good rule of thumb is to size the stream buffer to accommodate a Maximum Burst Duration of at least one second for such applications. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 78: Latency

    Network graph similar to the following. If plotted, you get a graph similar to the following. See example 1 for the parameters for this graph. Note: We recommend that the stream buffers are a multiple of 4 MiB in size. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 79: Example 1

    Stream buffer based on latency = 292 MiB • Therefore a stream buffer size between 244 and 292 MiB is required (in a multiple of 4 MiB). ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

  • Page 81: Support

    To start, we recommend you visit the Endace Support website at https://support.endace.com/. If you have a support contract with Endace you can login using your support username and password which provides access to the secure area of the website. The website contains the latest versions of software, user manuals, and release notes.

  • Page 82: Requesting Assistance

    Please check the contents of and remove any information which you feel is sensitive. dag-test.log Required Information The following information is always required by Endace Support when creating a Support Case: Product description and serial number. Your name. Your email address.

  • Page 83: Severity Levels Described

    Endace Support will endeavor to resolve the problem as quickly as possible. If a workaround can be achieved in a short time, it will be applied, and the priority of the case lowered while Endace Support works on implementing a more permanent solution.

  • Page 85: Version History

    The products described in this technical document are in development and have yet to complete final production quality assurance. Released The products described in this technical document have completed development and final production quality assurance. ©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012...

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