Receiver - Hitachi ATT-20 Installation, Operation, Troubleshooting

ATT-20 Audio Track Transceiver
Resistor R15 and R19 form a voltage divider which sets the bias for transistor Q4.
Capacitor C12 bypasses resistor R19. Transistors Q4, Q5, Q6 and Q8 make up a unity
gain with low output impedance. Diodes D4, D5, D6 and D8 - along with
amplifier
resistors R20 and R21 - serve to temperature compensate and bias both transistors Q5
and Q6. C13 is a bypass capacitor. Capacitor C6 and the primary of T3 couple the
signal to the output circuitry.
Inductor L5, jumper J2 and capacitor C9 from the shunt mode output, provide an output
impedance of 7 ohms.
Inductor L6, jumper and capacitor C9 form the series mode output provide an output
J1
impedance of 1 ohm.
Diode D7 prevents damage from reverse battery connection. Fuse prevents damage
F1
from an overcurrent condition. Inductors L2, L3 and capacitor provide RFI rejection.
C11
Capacitors C7 and the power bus.
C10 filter

3.4.2. Receiver

The receiver circuit diagram is shown in Figure 3-2. Capacitor C1, transformer T1 and
resistor R1 form a medium Q input filter. Jumper positions should be J1 and J3 for both
shunt and series mode boards. The input impedance is primarily determined by R1
(Shunt boards = 7 ohms, series boards = 1 ohm). Transistors Q1 and Q2 form a
Darlington pair emitter follower which buffers the input signal. Resistor R4 and Zener
diode D10 provide a fixed bias voltage for Q1 and Q2.
Inductors L3 and L4; capacitor C3, C4 and C5; and resistors R6 and R7, together form
a high Q bandpass filter. Diode D1 demonstrates the signal. Resistor R8 and capacitor
C6 filter the carrier frequency. Transistor Q3 and its associated circuitry form an emitter
follower to buffer the demodulated signal. Resistor R13 is selected to provide an input
sensitivity of 70 mVrms (modulated signal).
Transformer T2 and capacitor C9 form the demodulated filter. Transistors Q4 and Q5
are con-figured as an emitter follower which buffers the demodulated signal. Capacitors
C11 and C12, along with diode D3 and D4, form a voltage doubler. This doubler
produces a negative DC voltage which drives a level detector.
The level detector consists of resistor R17 and diode D5. Once in conduction, D5
provides the feedback path necessary for Q6 and its associated circuitry to behave as
an oscillator. The oscillator frequency is approximately 25 KHz. The output of the
oscillator is buffered by transistor Q7 and Q10. Transistors Q8 and Q9 amplify the
signal. Diodes D7 and Q11, along with capacitors C17 and C8, form a voltage doubler.
They also rectify and filter the signal to provide a negative DC voltage to drive an
external relay. The Q11 circuit decreases relay drop away time in lieu of the standard 2-
diode voltage doubler circuit. Inductors L1, L2, L6, and L7 (along with capacitors C19
and C7) provide RFI rejection. Capacitor C10 filters the power bus.
Copyright 2019 SM 6299 Rev. 3, March 2019 3-2