Microchip Technology PL360G55CB-EK User Manual page 14

...........continued
Pin
8
4. JTAG/SWD 10-pin connector for SAMG55J19, J7.
Table 3-5. SW-DP Connector, J7
Pin Mnemonic
1 VCC
2 SWDIO/TMS
3 GND
4 SWDCLK/TCK
5 GND
6 SWO/TDO
7 KEY
8 NC/TDI
9 GND Detect
10 nRESET
5. DC Input connector, J8.
Table 3-6. DC Input Connector, J8
Pin
1
2
3
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2019 Microchip Technology Inc.
Mnemonic
GND
This is the target reference voltage. It is used to check if the
target has power, to create the logic-level reference for the
input comparators, and to control the output logic levels to the
target. It is normally fed from V
must not have a series resistor.
Serial Wire Input Output / Test Mode Select. JTAG mode set
input of target CPU. This pin should be pulled up on the
target. Output signal that sequences the target's JTAG state
machine, sampled on the rising edge of the TCK signal.
Serial Wire Clock / Test Clock. JTAG clock signal to target
CPU (output timing signal, for synchronizing test logic and
control register access).
Test Asynchronous Data Out from target CPU.
Not Connected / Test Data Input. JTAG data input of target
CPU (serial data output line, sampled on the rising edge of the
TCK signal). It is recommended that this pin is pulled to a
defined state on the target board.
JTAG Reset (active-low output signal that resets the target).
™
Output from SAM-ICE to the Reset signal on the target JTAG
port. This pin is normally pulled HIGH on the target to avoid
unintentional resets when there is no connection.
Signal Name
DC_IN
GND
-
User Guide
PL360G55CB-EK
PL360G55CB-EK Board
Description
Reference Ground
Description
on the target board and
CC
Ground.
Ground.
-
Ground.
Description
DC Input voltage (6 - 30V)
Ground
-
DS50002871A-page 14