Function And Operation; Clock Supply; Operation Mode; Table 3.1 Operation Modes - Toshiba TXZ Series Reference Manual

3. Function and Operation

3.1. Clock Supply

When ENC is used, the corresponding clock enable bits should be set to "1" (Clock supply) in fsys supply stop
register A ([CGFSYSENA] and [CGFSYSMENA]), fsys supply stop register B ([CGFSYSENB] and
[CGFSYSMENB]), and fc supply stop register ([CGFCEN]). The registers and the bit locations depend on a
product. Some products do not have all registers. For the details, refer to "Clock control and operation mode" in
Reference manual.

3.2. Operation Mode

There are 13 operation modes in ENC. The mode is determined by the setting of [ENxTNCR]<MODE>, <P3EN>,
and <ZEN>. The operation modes are shown in the following table.
The other combinations should not be set.
[ENxTNCR]
<MODE> <ZEN>
0
000
1
001 0
010 0
0
011
1
110 0
0
1
111
1
2018-10-11

Table 3.1 Operation modes

Input pin
<P3EN>
ENCxA and ENCxB
0
ENCxA, ENCxB,
and ENCxZ
0 ENCxA and ENCxB
ENCxA, ENCxB,
1
and ENCxZ
0 ENCxA and ENCxB
ENCxA, ENCxB,
1
and ENCxZ
-
0
ENCxZ
0 ENCxA and ENCxB
ENCxA, ENCxB,
1
and ENCxZ
-
0
ENCxZ
1 ENCxZ
Advanced Encoder Input Circuit(32-bit)
Encoder mode (without ENCxZ signal)
Encoder mode (with ENCxZ signal)
Sensor mode (Event count: 2-pahse input)
Sensor mode (Event count: 3-phase input)
Sensor mode (Timer count: 2-phase input)
Sensor mode (Timer count: 3-phase input)
Timer mode
Timer mode (with Capture input)
Sensor mode (Phase count: 2-phase input)
Sensor mode (Phase count: 3-phase input)
Phase counter mode (Phase count)
Phase counter mode (Phase count: with Capture
input)
Phase counter mode (Phase difference
measurement)
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TXZ Family
Mode
Rev. 1.1