Programmable Function Interfaces (Pfi); Inputs; Outputs - National Instruments 6711 User Manual

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6
Programmable Function
Interfaces (PFI)
The 10 Programmable Function Interface (PFI) pins allow timing signals to be routed to and
from the I/O connector of a device.

Inputs

An external timing signal can be input on any PFI pin and multiple timing signals can
simultaneously use the same PFI pin. This flexible routing scheme reduces the need to change
the physical connections to the I/O connector for different applications. For more information,
Timing Signal Routing
Digital
Routing.
refer to the
section of Chapter 7,
When using the PFI pin as an input, you can individually configure each PFI for edge or level
detection and for polarity selection. You can use the polarity selection for any of the timing
signals, but the edge or level detection depends upon the particular timing signal being
controlled. The detection requirements for each timing signal are listed within the section that
discusses that signal.
In edge-detection mode, the minimum pulse width required is 10 ns. This applies for both
rising-edge and falling-edge polarity settings. There is no maximum pulse width requirement in
edge-detect mode.
In level-detection mode, there are no minimum or maximum pulse width requirements imposed
by the PFI signals, but there can be limits imposed by the particular timing signal being
controlled.

Outputs

You can also individually enable each PFI pin to output a specific internal timing signal. For
example, if you need the Counter 0 Source signal as an output on the I/O connector, software
can turn on the output driver for the PFI 8/CTR 0 SRC pin. This signal, however, cannot be
output on any other PFI pin.
© National Instruments | 6-1

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