Toshiba TLCS-90 Series Data Book page 119

TOSHIBA TMP 8048PI, TMP 8035PI
PIN NAMES AND PIN· DESCRIPTION
VSS (Power Supply)
Circuit GND potential
VDD (Power Supply)
+SV
during operation La,,' power standby pin for THP8048 RAM
vec
(Hain Power Supply)
+SV
during operation
PROG(Output)
Output strobe for the TMP8243P I/O expander
PIO-PI7 (Input/Output) Port 1
8-bit quasi -bidirectional port (Internal Pullup=SOkQ).
P20-P27 (Input/Output) Port 2
8-bit quasi-bidirectional port (Internal Pullup=SOkn).
P20-P23 Contain the four high order
progr~
counter bits during an
external prog~a~ mecory fetch and serve as a 4-bit I/O expander bus for
the TMP8243P.
DBO-~B7
(Input/Output, 3 State)
Co:'!t
~i:1
S
the
f: 10' .. ,
order 1='r0 gra::-: counter bits curing a::. external progra::: merr.~
fetch, and receives the addressed instruction under the control of PSEN.
Also contains the address and data during an external RAM data store
instruction, under control of ALE, RD, and WR.
TO (Input/Output)
Input pin testable using the conditional transfer instructions JTO and
J~~O. TO can be designated as a clock output using ENTO CLK instruction.
TI (Input)
Input pin testable using the JTI and JNTl instruction. Can be designated
the event counter input using the timer/STR! CN! instruction.
INT (Input)
External interrupt input. Initiates an interrupt if interrupt is
enabled. Interrupt is disabled after a reset. Also testable with
conditional jump instruction. (Active Low)
RD (Output)
Output strobe activated during a Bus read. Can be used to enable data
onto the Bus from an external device. Used as a Read Strobe to External
Data Memory (Active Low).
WR (Output)
Output strobe during a Bus write (Active Low) Used as a Write Strobe
to
External Data Memory.
MCU48-I09