Page 1 DAQ X Series X Series User Manual NI 632x/634x/635x/636x/637x/638x/639x Devices X Series User Manual Français Deutsch ni.com/manuals May 2019 370784K-01...
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Page 3 You must obtain an RMA number from NI before returning any product to NI. NI reserves the right to charge a fee for examining and testing Hardware not covered by the Limited Warranty.
Page 4 LEAD TO DEATH, PERSONAL INJURY, SEVERE PROPERTY DAMAGE OR ENVIRONMENTAL HARM (COLLECTIVELY, “HIGH-RISK USES”). FURTHER, PRUDENT STEPS MUST BE TAKEN TO PROTECT AGAINST FAILURES, INCLUDING PROVIDING BACK-UP AND SHUT-DOWN MECHANISMS. NI EXPRESSLY DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY OF FITNESS OF THE PRODUCTS OR SERVICES FOR HIGH-RISK...
Page 5: Table Of Contents
Device Self-Calibration ....................1-4 Getting Started with X Series USB Devices ..............1-5 USB Device Chassis Ground..................1-5 Ferrite Installation..................... 1-6 Mounting NI USB X Series Devices................ 1-7 Panel/Wall Mounting..................1-7 DIN Rail Mounting................... 1-8 USB Device LEDs....................1-9 USB Cable Strain Relief................... 1-9 USB Device Security Cable Slot ................
Page 6 Floating Signal Sources ................. 4-13 Using Differential Connections for Floating Signal Sources ......4-13 Using Non-Referenced Single-Ended (NRSE) Connections for Floating Signal Sources ................4-16 Using Referenced Single-Ended (RSE) Connections for Floating Signal Sources ................4-17 vi | ni.com...
Page 7 X Series User Manual Connecting Ground-Referenced Signal Sources ............4-17 What Are Ground-Referenced Signal Sources? ..........4-17 When to Use Differential Connections with Ground-Referenced Signal Sources ....................4-18 When to Use Non-Referenced Single-Ended (NRSE) Connections with Ground-Referenced Signal Sources .............. 4-18 When to Use Referenced Single-Ended (RSE) Connections with Ground-Referenced Signal Sources ..............
Page 8 Routing DI Sample Clock to an Output Terminal ..........6-5 Other Timing Requirements ................6-5 DI Sample Clock Timebase Signal ................6-6 DI Start Trigger Signal ..................... 6-7 Retriggerable DI ....................6-7 Using a Digital Source ..................6-7 viii | ni.com...
Page 9 X Series User Manual Using an Analog Source ................... 6-8 Routing DI Start Trigger to an Output Terminal..........6-8 DI Reference Trigger Signal..................6-8 Using a Digital Source..................6-9 Using an Analog Source ................... 6-9 Routing DI Reference Trigger Signal to an Output Terminal ......6-9 DI Pause Trigger Signal ...................
Page 10 Implicit Buffered Two-Signal Edge-Separation Measurement ......7-25 Sample Clocked Buffered Two-Signal Separation Measurement ....7-25 Hardware-Timed Single Point Two-Signal Separation Measurement ..... 7-26 Counter Output Applications .................... 7-26 Simple Pulse Generation...................7-27 Single Pulse Generation..................7-27 Single Pulse Generation with Start Trigger ............7-27 x | ni.com...
Page 11 X Series User Manual Pulse Train Generation ..................... 7-28 Finite Pulse Train Generation................7-28 Retriggerable Pulse or Pulse Train Generation ..........7-29 Continuous Pulse Train Generation..............7-30 Buffered Pulse Train Generation ..............7-31 Finite Implicit Buffered Pulse Train Generation ..........7-31 Continuous Buffered Implicit Pulse Train Generation........
Page 12 Bus Interface Data Transfer Methods ..................... 10-1 PCI Express/PXI Express Device Data Transfer Methods ........10-1 USB Device Data Transfer Methods ................ 10-2 PXI Express Considerations ..................... 10-3 PXI and PXI Express Clock and Trigger Signals ............. 10-3 xii | ni.com...
Page 13 NI Services Index List of Figures Figure A-1. NI PCIe-6320 Pinout ................A-2 Figure A-2. NI PCIe-6321 and NI PCIe/PXIe-6341 Pinout ........A-4 Figure A-3. NI USB-6341 Screw Terminal Pinout........... A-5 Figure A-4. NI USB-6341 BNC Pinout ..............A-6 Figure A-5.
Page 14 NI PXIe-6358/6368/6378 Pinout............A-39 Figure A-27. NI PXIe-6365 Connector 2 Pinout ............A-41 Figure A-28. NI PXIe-6365 Connector 0 and Connector 1 Pinout ......A-42 Figure A-29. NI PCIe-6374 Pinout ................A-44 Figure A-30. NI PXIe-6375 Connector 2 and Connector 3 Pinout ......A-46 Figure A-31.
Page 15: Getting Started
(DIO), and four counters. This chapter provides basic information you need to get started using your X Series device. Safety Guidelines Operate the NI 63xx X Series devices and modules only as described in this user manual. NI 63xx devices and modules are not certified for use in hazardous Caution locations.
Page 16: Electromagnetic Compatibility Guidelines
At the end of the product life cycle, all products must be sent to EU Customers a WEEE recycling center. For more information about WEEE recycling centers, National Instruments WEEE initiatives, and compliance with WEEE Directive 2002/96/EC on Waste and Electronic Equipment, visit ni.com/environment/ weee 1-2 | ni.com...
Page 17: Installation
Remove the device from the package and inspect it for loose components or any other signs of damage. Notify NI if the device appears damaged in any way. Do not install a damaged device in your computer or chassis.
Page 18: Device Self-Calibration
Getting Started Device Self-Calibration NI recommends that you self-calibrate your X Series device after installation and whenever the ambient temperature changes. Self-calibration should be performed after the device has warmed up for the recommended time period. Refer to the device specifications to find your device warm-up time.
Page 19: Getting Started With X Series Usb Devices
You can attach a wire to a CHS GND screw terminal of any (NI USB-63xx BNC Devices) NI BNC USB-63xx device. Use as short a wire as possible. In addition, the wires in the shielded cable that extend beyond the shield should be as short as possible.
Page 20: Ferrite Installation
To ensure the specified EMC (NI USB-63xx Mass Termination and BNC Devices) performance for radiated RF emissions of the NI USB-63xx Mass Termination and BNC device, install the included snap-on ferrite bead onto the power cable, as shown in Figure 1-2.
Page 21: Mounting Ni Usb X Series Devices
Panel/Wall Mounting Complete the following steps to mount your NI USB X Series device to a wall or panel using the USB X Series mounting kit (part number 781514-01 not included in your USB X Series device kit). Refer to Figure 1-3.
Page 22: Din Rail Mounting
Place the USB X Series device on the backpanel wall mount with the signal wires facing down and the device bottom sitting on the backpanel wall mount lip. While holding the USB X Series device in place, attach the front bracket to the backpanel wall mount by tightening the two thumbscrews. 1-8 | ni.com...
Page 23: Usb Device Leds
X Series User Manual USB Device LEDs Refer to the USB Device LED Patterns section of Chapter 3, Connector (NI USB-63 Devices) and LED Information, for information about the USB X Series device READY and ACTIVE LEDs. USB Cable Strain Relief...
Page 24: Usb Device Security Cable Slot
Refer to the device specifications document for your device. X Series device documentation is available on ni.com/manuals Device Accessories and Cables NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for more information.
Page 25: Daq System Overview
DAQ System Overview Figure 2-1 shows a typical DAQ system, which includes sensors, transducers, signal conditioning devices, cables that connect the various devices to the accessories, the X Series device, programming software, and PC. The following sections cover the components of a typical DAQ system.
Page 26: Daq Hardware
True 5 V high current drive DO • DI change detection • DO watchdog timers • PLL for clock synchronization • Seamless interface to signal conditioning accessories • PCI Express/PXI Express interface • Independent scatter-gather DMA controllers for all acquisition and generation functions 2-2 | ni.com...
Page 27: Calibration Circuitry
NI offers a variety of products to use with X Series PCI Express, PXI Express, USB devices, including cables, connector blocks, and other accessories, as follows: •...
Page 28: Pci Express, Pxi Express, And Usb Mass Termination Device Cables And Accessories
Use Connector 0 of your X Series device to control SCXI in parallel and multiplexed mode. NI-DAQmx only supports SCXI in parallel mode on Connector 1, 2, or 3. When using Connector 1, 2, or 3 in parallel mode with SCXI modules that Note support track and hold, you must programmatically disable track and hold.
Page 29: Bnc Accessories
The BNC-2111 cannot be used with NI 6356/6358/6366/6368/6374/6376/6378/6386/6396 SMIO X Series devices. † The BNC-2115 can only be used on connectors 1, 2, or 3 of NI 6345/6355/6365/6375 devices and connector 1 of the NI 6349 device. © National Instruments | 2-5...
Page 30: Screw Terminal Accessories
1 of any X series device except the NI 6345/6349/6355/ 6365/6375 devices. The BNC-2115 can only be used on connectors 1, 2, or 3 of the NI 6345/ 6355/6365/6375 devices and connector 1 of the NI 6349 device.
Page 31: Custom Cabling And Connectivity
USB Device Accessories, USB Cable, Power Supply, and Ferrite NI offers a variety of products to use with the USB X Series devices, as shown in Table 2-3. NI recommends that you use the SHC68-68-EPM cable; however, an SHC68-68-EP cable works with X Series devices.
Page 32: Signal Conditioning
780534-01 EMI suppression ferrites, 10.2 mm length 781233-02 Not for use with NI USB BNC devices. Signal Conditioning Most computer-based measurement systems involve plug-in data acquisition (DAQ) devices with some form of signal conditioning. Sensors and transducers usually require signal conditioning before a measurement system can effectively and accurately acquire the signal.
Page 33: Signal Conditioning Options
X Series User Manual • If you are using other application software, refer to Common Sensors in the NI-DAQmx Help or the LabVIEW Help. Signal Conditioning Options SCXI SCXI is a front-end signal conditioning and switching system for various measurement devices, including X Series devices.
Page 34: Programming Devices In Software
VIs you can call from your application software, such as LabVIEW or LabWindows/CVI, to program all the features of your NI measurement devices. Driver software has an application programming interface (API), which is a library of VIs, functions, classes, attributes, and properties for creating applications for your device.
Page 35 X Series User Manual Table 2-4 lists the earliest NI-DAQmx support version for each X Series device. Table 2-4. X Series NI-DAQmx Software Support Device NI-DAQmx Earliest Version Support NI PCIe/PXIe-632x/6341/6343 NI-DAQmx 9.0 NI PCIe/PXIe-6351/6353/6361/6363 NI-DAQmx 9.0 NI PXIe-6356/6358/6366/6368 NI-DAQmx 9.0.2 NI USB-6341/6343/6351/6353/6361/6363 NI-DAQmx 9.2...
Page 36: Connector And Led Information
Connector and LED Information I/O Connector Signal Descriptions +5 V Power Source sections contain information about X Series connector signals and power. Refer to Appendix A, Device-Specific Information, for device I/O connector pinouts. PCI Express Device Disk Drive Power Connector RTSI Connector Pinout sections refer to X Series PCI Express device power and the RTSI connector on PCI Express devices.
Page 37: I/O Connector Signal Descriptions
Simultaneous MIO X Series devices, AI 0+ and AI 0- are the positive and negative inputs of differential analog input channel 0. Also refer to the Connecting Analog Input Signals section of Chapter 4, Analog Input. 3-2 | ni.com...
Page 38 X Series User Manual Table 3-1. I/O Connector Signals (Continued) Signal Name Reference Direction Description AI SENSE, — Input Analog Input Sense—In NRSE mode, the reference AI SENSE 2, for each AI <0..15> signal is AI SENSE; the AI SENSE 3, reference for each AI <16..31>...
Page 39 — User-Defined Channels 1 and 2—On USER 2 NI USB-63xx BNC devices, the USER <1..2> BNC connectors allow you to use a BNC connector for a digital or timing I/O signal of your choice. The USER <1..2> BNC connectors are internally routed to the USER <1..2>...
Page 40: +5 V Power Source
Caution any other voltage source on the X Series device or any other device. Doing so can damage the device and the computer. NI is not liable for damage resulting from such a connection. The power rating on most devices is +4.75 VDC to +5.25 VDC at 1 A.
Page 41: Pci Express Device Disk Drive Power Connector
Figure 3-2. The power available on the disk drive power connectors in a computer can Note vary. For example, consider using a disk drive power connector that is not in the same power chain as the hard drive. 3-6 | ni.com...
Page 42: Rtsi Connector Pinout
Off or On The device is not powered or not connected to the host computer, or the host computer does not have the correct version of NI-DAQmx. Refer to Table 2-4, X Series NI-DAQmx Software Support, for the NI-DAQmx support information for your device.
Page 43: Analog Input
• Mux—Each MIO X Series device has one analog-to-digital converter (ADC). The multiplexers (mux) route one AI channel at a time to the ADC through the NI-PGIA. • Ground-Reference Settings—The analog input ground-reference settings circuitry selects between differential, referenced single-ended, and non-referenced single-ended input modes.
Page 44: Analog Input Range
Instrumentation Amplifier (NI-PGIA)—The NI programmable gain instrumentation amplifier (NI-PGIA) is a measurement and instrument class amplifier that minimizes settling times for all input ranges. The NI-PGIA can amplify or attenuate an AI signal to ensure that you use the maximum resolution of the ADC.
Page 45: Working Voltage Range
Table 4-1. MIO X Series Device Input Range and Nominal Resolution Nominal Resolution MIO X Series Device Input Range Assuming 5% Over Range NI 632x/6341/6343 -10 V to 10 V 320 μV -5 V to 5 V 160 μV -1 V to 1 V 32 μV...
Page 46: Analog Input Ground-Reference Settings
MIO X Series devices implement the different analog input ground-reference settings by routing different signals to the NI-PGIA. The NI-PGIA is a differential amplifier. That is, the NI-PGIA amplifies (or attenuates) the difference in voltage between its two inputs. The NI-PGIA drives the ADC with this amplified voltage.
Page 47 X Series User Manual Table 4-2 shows how signals are routed to the NI-PGIA on MIO X Series devices. Table 4-2. Signals Routed to the NI-PGIA on MIO X Series Devices Signals Routed to the Signals Routed to the AI Ground-Reference...
Page 48: Configuring Ai Ground-Reference Settings In Software
NI-PGIA with the input range of the new channel. The NI-PGIA then amplifies the input signal with the gain for the new input range. Settling time refers to the time it takes the NI-PGIA to amplify the input signal to the desired accuracy before it is sampled by the ADC. To determine your device settling time, refer to the device specifications.
Page 49 0. This effect is referred to as ghosting. If your source impedance is high, you can decrease the scan rate to allow the NI-PGIA more time to settle. Another option is to use a voltage follower circuit external to your DAQ device to decrease the impedance seen by the DAQ device.
Page 50 (the square root of 2). However, doubling the number of samples (in this example) decreases the time the NI-PGIA has to settle from 4 μs to 2 μs. In some cases, the slower scan rate system returns more accurate results.
Page 51: Analog Input Data Acquisition Methods
Software-Timed Acquisitions With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each ADC conversion. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.
Page 52: Analog Input Triggering
HWTSP operations, in conjunction with the wait for next sample clock function, provide tight synchronization between the software layer and the hardware layer. Refer to the NI-DAQmx Hardware-Timed Single Point Lateness Checking document, for more information. To access this document, go to and enter ni.com/info...
Page 53 X Series User Manual Table 4-3. MIO X Series Analog Input Configuration Floating Signal Sources (Not Connected to Ground-Referenced † Building Ground) Signal Sources Examples: Example: • Ungrounded thermocouples • Plug-in instruments with non-isolated outputs • Signal conditioning with isolated outputs AI Ground-Reference •...
Page 54: Connecting Floating Signal Sources
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Page 55: When To Use Referenced Single-Ended (Rse) Connections With Floating Signal Sources
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Page 56 This configuration does not load down the source (other than the very high input impedance of the NI-PGIA). Figure 4-5. Differential Connections for Floating Signal Sources...
Page 57 MIO X Series Device Configured in Differential Mode Both inputs of the NI-PGIA require a DC path to ground in order for the NI-PGIA to work. If the source is AC coupled (capacitively coupled), the NI-PGIA needs a resistor between the positive input and AI GND.
Page 58: Using Non-Referenced Single-Ended (Nrse) Connections For Floating Signal Sources
It is important to connect the negative lead of a floating signals source to AI GND (either directly or through a resistor). Otherwise the source may float out of the valid input range of the NI-PGIA and the DAQ device returns erroneous data.
Page 59: Using Referenced Single-Ended (Rse) Connections For Floating Signal Sources
I/O Connector Selected Channel in RSE Configuration To measure a floating signal Note (NI USB-6341/6343/6361/6363 BNC Devices) source on X Series USB BNC devices, move the switch under the BNC connector to the FS position. Using the DAQ Assistant, you can configure the channels for RSE or NRSE input modes. Refer...
Page 60: When To Use Differential Connections With Ground-Referenced Signal Sources
With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground.
Page 61: When To Use Referenced Single-Ended (Rse) Connections With Ground-Referenced Signal Sources
X Series USB BNC devices, move the switch under the BNC connector to the GS position. With this type of connection, the NI-PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as Vcm in the figure.
Page 62: Using Non-Referenced Single-Ended (Nrse) Connections For Ground-Referenced Signal Sources
AI <80..143> AI SENSE 3 AI <144..207> AI SENSE 4 AI SENSE is internally connected to the negative input of the NI-PGIA. Therefore, the ground point of the signal connects to the negative input of the NI-PGIA. 4-20 | ni.com...
Page 63: Field Wiring Considerations
Any potential difference between the device ground and the signal ground appears as a common-mode signal at both the positive and negative inputs of the NI-PGIA, and this difference is rejected by the amplifier. If the input circuitry of a device were referenced to ground, as it is in the RSE ground-reference setting, this difference in ground potentials would appear as an error in the measured voltage.
Page 64: Analog Input Timing Signals
1/Sample Period = Sample Rate Figure 4-13. MIO X Series Interval Sampling Channel 0 Channel 1 Convert Period Sample Period AI Convert Clock controls the Convert Period, which is determined by the following equation: 1/Convert Period = Convert Rate 4-22 | ni.com...
Page 65 X Series User Manual Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received. A typical posttriggered DAQ sequence is shown in Figure 4-14. The sample counter is loaded with the specified number of posttrigger samples, in this example, five. The value decrements with each pulse on AI Sample Clock, until all desired samples have been acquired.
Page 66: Aggregate Versus Single Channel Sample Rates
For example, NI 6351 devices have a single channel maximum rate of 1.25 MS/s and aggregate maximum sample rate of 1 MS/s so they can sample one channel at 1.25 MS/s or two channels at 500 kS/s per channel, as shown in Table 4-5.
Page 67 A programmable internal counter divides down the sample clock timebase. Several other internal signals can be routed to AI Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an External Source Use one of the following external signals as the source of AI Sample Clock: •...
Page 68: Ai Sample Clock Timebase Signal
Timebase is divided down to provide one of the possible sources for AI Sample Clock. You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge, except on 100 MHz Timebase or 20 MHz Timebase. 4-26 | ni.com...
Page 69: Ai Convert Clock Signal
It then reloads itself in preparation for the next AI Sample Clock pulse. Several other internal signals can be routed to AI Convert Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. © National Instruments | 4-27...
Page 70 Similarly, the device ignores all AI Convert Clock pulses until it recognizes an AI Sample Clock pulse. Once the device receives the correct number of AI Convert Clock pulses, it ignores subsequent AI Convert Clock pulses until it receives another AI Sample Clock. However, after 4-28 | ni.com...
Page 71 X Series User Manual the device recognizes an AI Sample Clock pulse, it causes an error if it receives an AI Sample Clock pulse before the correct number of AI Convert Clock pulses are received. Figures 4-18, 4-19, 4-20, and 4-21 show timing sequences for a four-channel acquisition (using AI channels 0, 1, 2, and 3) and demonstrate proper and improper sequencing of AI Sample Clock and AI Convert Clock.
Page 72: Ai Convert Clock Timebase Signal
Retriggerable Analog Input The AI Start Trigger is also configurable as retriggerable. The timing engine generates the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal. 4-30 | ni.com...
Page 73 The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger.
Page 74: Ai Reference Trigger Signal
When the reference trigger occurs, the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 4-23 shows the final buffer. Figure 4-23. Reference Trigger Final Buffer Reference Trigger Pretrigger Samples Posttrigger Samples Complete Buffer 4-32 | ni.com...
Page 75 The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger.
Page 76: Ai Pause Trigger Signal
• DI Pause Trigger (di/PauseTrigger) The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. 4-34 | ni.com...
Page 77: Getting Started With Ai Applications In Software
Note triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help. MIO X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application. You can use examples to develop a new application or add example code to an existing application.
Page 78: Analog Input On Simultaneous Mio X Series Devices
I/O connector pinouts. • Instrumentation Amplifier (NI-PGIA)—The NI programmable gain instrumentation amplifier (NI-PGIA) can amplify or attenuate an AI signal to ensure that you get the maximum resolution of the ADC. The NI-PGIA also allows you to select the input range. •...
Page 79: Analog Input Terminal Configuration
Choosing a smaller input range improves the voltage resolution, but may result in the input signal going out of range. For more information about setting ranges, refer to the NI-DAQmx Help or the LabVIEW Help. © National Instruments | 4-37...
Page 80: Working Voltage Range
The total working voltage of the positive input, which is equivalent to (Vcm + Vs), or subtracting AI <0..x> GND from AI <0..x>+, must be less than ±11 V. This does not apply to the NI 6346 and NI 6349, which have lower working voltages for lower ranges. Refer to the device specifications on for working voltage values per range.
Page 81 To ensure this condition never occurs, NI-DAQmx adds a background channel for finite acquisitions that have both an odd number of channels and an odd number of samples-per-channel.
Page 82: Analog Input Triggering
Refer to the NI-DAQmx Hardware-Timed Single Point Lateness Checking document for more information. To access this document, go to and enter the Info Code ni.com/info...
Page 83: Connecting Analog Input Signals
X Series User Manual Connecting Analog Input Signals Table 4-7 summarizes the recommended input configuration for different types of signal sources for Simultaneous MIO X Series devices. Table 4-7. Simultaneous MIO X Series Analog Input Signal Configuration Floating Signal Sources (Not Connected to Ground-Referenced Signal Earth Ground)
Page 84: Differential Connections For Ground-Referenced Signal Sources
I/O Connector AI 0 Connections Shown To measure a floating signal Note (NI USB-6346/6356/6366 BNC Devices) source on X Series USB BNC devices, move the switch under the BNC connector to the GS position. With these types of connections, the instrumentation amplifier rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the device ground, shown as Vcm in Figure 4-26.
Page 85: Differential Connections For Floating Signal Sources
I/O Connector AI 0 Connections Shown To measure a floating signal Note (NI USB-6346/6356/6366 BNC Devices) source on X Series USB BNC devices, move the switch under the BNC connector to the FS position. Figure 4-27 shows bias resistors connected between AI 0-, AI 0+, and the floating signal source ground.
Page 86: Unused Channels
Unused Channels NI recommends connecting unused channel inputs AI+ and AI- to AIGND. This prevents the inputs from floating outside of the Vcm rating, which can generate unecessary heat and measurement drift. Additionally, open inputs can detect and amplify unwanted environmental noise.
Page 87: Minimizing Drift In Differential Mode
Refer to the Field Wiring and Noise Considerations for Analog Signals document for more information. To access this document, go to and enter the Info Code ni.com/info rdfwn3 Minimizing Drift in Differential Mode If the readings from the DAQ device are random and drift rapidly, you should check the ground-reference connections.
Page 88 Analog Input Triggering section. Simultaneous MIO X Series devices feature the following analog input timing signals: • AI Sample Clock Signal • AI Sample Clock Timebase Signal • AI Hold Complete Event Signal • AI Start Trigger Signal 4-46 | ni.com...
Page 89: Aggregate Versus Single Channel Sample Rates
AI Reference Trigger Signal • AI Pause Trigger Signal AI tasks do not support pause triggering on Note NI PXIe-6386/6396 Devices) PXIe-6386 and PXIe-6396 devices. For more information about special considerations for these devices, go to and enter the Info Code ni.com/info...
Page 90: Ai Sample Clock Signal
A programmable internal counter divides down the sample clock timebase. Several other internal signals can be routed to AI Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an External Source Use one of the following external signals as the source of AI Sample Clock: •...
Page 91: Ai Sample Clock Timebase Signal
• Analog Comparison Event (an analog trigger) PXIe-6386 and PXIe-6396 devices differ in Note (NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about using an external source with these devices, go to and enter the Info Code ni.com/info...
Page 92: Ai Hold Complete Event Signal
• Analog Comparison Event (an analog trigger) PXIe-6386 and PXIe-6396 devices differ in Note (NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about these devices related to AI Sample Clocks, go to and enter the Info Code ni.com/info...
Page 93 X Series User Manual considerations for these devices, go to and enter the Info Code ni.com/info smio14ms The AI Start Trigger is configurable as retriggerable. When the AI Start Trigger is configured as retriggerable, the timing engine generates the sample and convert clocks for the configured acquisition in response to each pulse on an AI Start Trigger signal.
Page 94 The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger.
Page 95: Ai Reference Trigger Signal
You can select the buffer on the host or on the Note (NI USB-6356/6366 Devices) NI USB-6356/6366 device. To enable a Reference Trigger to Onboard Memory, set the AI Data Transfer Request Condition property in NI-DAQmx to When Acquisition Complete.
Page 96: Ai Pause Trigger Signal
The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger.
Page 97 DO Pause Trigger (do/PauseTrigger) The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. © National Instruments | 4-55...
Page 98: Getting Started With Ai Applications In Software
Some of the applications also use start and reference pause triggers. For more information about programming analog input applications and Note triggers in software, refer to the NI-DAQmx Help or the LabVIEW Help in version 8.0 or later. Simultaneous MIO X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application.
Page 99: Analog Output
Analog Output Many X Series devices have analog output functionality. X Series devices that support analog output have either two or four AO channels that are controlled by a single clock and are capable of waveform generation. Refer to Appendix A, Device-Specific Information, for information about the capabilities of your device.
Page 100: Ao Reference Selection
The possible settings for AO reference depend on the device model. For models not described below, refer to the device specifications. • The AO reference is always 10 V. The (NI 6321/6323/6341/6343/6346/6349 Devices) analog output range equals ±10 V. • The AO reference of each analog output...
Page 101: Analog Output Data Generation Methods
Software-Timed Generations With a software-timed generation, software controls the rate at which data is generated. Software sends a separate command to the hardware to initiate each DAC conversion. In NI-DAQmx, software-timed generations are referred to as on-demand timing. Software-timed generations are also referred to as immediate or static operations.
Page 102: Analog Output Triggering
PC buffer is continually downloaded to the FIFO to be written out. New data can be written to the PC buffer at any time without disrupting the output. Use the NI-DAQmx write property RegenMode to allow (or not allow) regeneration. The NI-DAQmx default is to allow regeneration.
Page 103: Connecting Analog Output Signals
X Series User Manual Connecting Analog Output Signals AO <0..3> are the voltage output signals for analog output channels 0, 1, 2, and 3. AO GND is the ground reference for AO <0..3>. Figure 5-2 shows how to make analog output connections to the device. Figure 5-2.
Page 104: Ao Start Trigger Signal
DI Reference Trigger (di/ReferenceTrigger) • DO Start Trigger (do/StartTrigger) The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. 5-6 | ni.com...
Page 105: Using An Analog Source
X Series User Manual You can also specify whether the waveform generation begins on the rising edge or falling edge of AO Start Trigger. Using an Analog Source When you use an analog trigger source, the waveform generation begins on the first rising edge of the Analog Comparison Event signal.
Page 106: Using A Digital Source
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the samples are paused when AO Pause Trigger is at a logic high or low level.
Page 107: Using An External Source
A programmable internal counter divides down the AO Sample Clock Timebase signal. Several other internal signals can be routed to AO Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an External Source Use one of the following external signals as the source of AO Sample Clock: •...
Page 108: Ao Sample Clock Timebase Signal
You can use an external sample clock signal as AO Sample Clock Timebase signal by dividing the signal down in a DAQ device. You can also use it as AO Sample Clock signal without dividing the signal. 5-10 | ni.com...
Page 109: Getting Started With Ao Applications In Software
NI-DAQmx Help or the LabVIEW Help. X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application.
Page 110: Digital I/O
Digital I/O X Series devices contain up to 32 lines of bidirectional DIO signals on Port 0. In addition, X Series devices have up to 16 PFI signals that can function as static DIO signals. X Series devices support the following DIO features on Port 0: •...
Page 111: Digital Input Data Acquisition Methods
Software-Timed Acquisitions With a software-timed acquisition, software controls the rate of the acquisition. Software sends a separate command to the hardware to initiate each acquisition. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.
Page 112: Digital Input Triggering
HWTSP operations, in conjunction with the wait for next sample clock function, provide tight synchronization between the software layer and the hardware layer. Refer to the NI-DAQmx Hardware-Timed Single Point Lateness Checking document for more information. To access this document, go to and enter ni.com/info...
Page 113: Digital Waveform Acquisition
DI waveform acquisition FIFO. You can specify an internal or external source for DI Sample Clock. You can also specify whether the measurement sample begins on the rising edge or falling edge of DI Sample Clock. 6-4 | ni.com...
Page 114: Using An Internal Source
DI Change Detection output Several other internal signals can be routed to DI Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an External Source You can route any of the following signals as DI Sample Clock: •...
Page 115: Di Sample Clock Timebase Signal
Refer to the device routing table in MAX for all additional routable signals. To find the device routing table for your device, launch MAX and select Devices and Interfaces»NI-DAQmx Devices. Click a device to open a tabbed window in the middle pane. Click the Device Routes tab at the bottom of the pane to display the device routing table.
Page 116: Di Start Trigger Signal
X Series User Manual not need to divide the signal, then you should use DI Sample Clock rather than DI Sample Clock Timebase. DI Start Trigger Signal Use the DI Start Trigger (di/StartTrigger) signal to begin a measurement acquisition. A measurement acquisition consists of one or more samples.
Page 117: Using An Analog Source
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition begins on the rising edge or falling edge of DI Start Trigger.
Page 118: Using A Digital Source
The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the measurement acquisition stops on the rising or falling edge or falling edge of DI Reference Trigger.
Page 119: Di Pause Trigger Signal
DO Pause Trigger (do/PauseTrigger) The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an Analog Source When you use an analog trigger source, the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high (or vice versa).
Page 120: Routing Di Pause Trigger Signal To An Output Terminal
Software-Timed Generations With a software-timed generation, software controls the rate at which data is generated. Software sends a separate command to the hardware to initiate each update. In NI-DAQmx, software-timed generations are referred to as on-demand timing. Software-timed generations are also referred to as immediate or static operations.
Page 121: Digital Output Triggering
PC buffer is continually downloaded to the FIFO to be written out. New data can be written to the PC buffer at any time without disrupting the output. Use the NI-DAQmx write property regenMode to allow (or not allow) regeneration. The NI-DAQmx default is to allow regeneration.
Page 122: Digital Waveform Generation
X Series User Manual Digital Waveform Generation You can generate digital waveforms on the Port 0 DIO lines. The DO waveform generation FIFO stores the digital samples. X Series devices have a DMA controller dedicated to moving data from the system memory to the DO waveform generation FIFO. The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal, DO Sample Clock.
Page 123: Using An External Source
DI Change Detection output Several other internal signals can be routed to DO Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. Using an External Source Use one of the following external signals as the source of DO Sample Clock: •...
Page 124: Do Sample Clock Timebase Signal
X Series User Manual DO Sample Clock Timebase Signal The DO Sample Clock Timebase (do/SampleClockTimebase) signal is divided down to provide a source for DO Sample Clock. You can route any of the following signals to be the DO Sample Clock Timebase signal: •...
Page 125: Using A Digital Source
The source can also be one of several internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the waveform generation begins on the rising edge or falling edge of DO Start Trigger.
Page 126: Using A Digital Source
The source can also be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. You can also specify whether the samples are paused when DO Pause Trigger is at a logic high or low level.
Page 127: Using An Analog Source
A high-impedance input with a weak pull-down resistor (default) • An output driving a 0 • An output driving a 1 Refer to the NI-DAQmx Help or the LabVIEW Help for more information about setting power-up states in NI-DAQmx or MAX. 6-18 | ni.com...
Page 128: Di Change Detection
X Series User Manual When using your X Series device to control an SCXI chassis, DIO lines 0, 1, Note 2, and 4 are used as communication lines and must be left to power-up in the default high-impedance state to avoid potential damage to these signals. DI Change Detection You can configure the DAQ device to detect changes on all 32 digital input lines (P0, P1, and P2) and all 16 PFI lines.
Page 129: Di Change Detection Applications
Guaranteed to Pass Guaranteed to Not Filter Setting Filter Clock Filter Pass Filter Short 12.5 MHz 160 ns 80 ns Medium 195.3125 kHz 10.24 µs 5.12 µs High 390.625 Hz 5.12 ms 2.56 ms None — — — 6-20 | ni.com...
Page 130 X Series User Manual The filter setting for each input can be configured independently. On power up, the filters are disabled. Figure 6-12 shows an example of a low-to-high transition on an input. Figure 6-12. Input Low-to-High Transition Digital Input P0.x Filter Clock Filtered Input When multiple lines are configured with the same filter settings they are considered a bus.
Page 131 2A With line filtering, filtered input A would ignore the glitch on digital input P0.B and transition after two filter clocks. 3A Filtered input A goes high when sampled high for two consecutive filter clocks and transitions on the next filter edge because digital input P0.B glitches. 6-22 | ni.com...
Page 132: Watchdog Timer
X Series device. The NI-DAQmx Watchdog feature is meant to protect a system from Note software errors and hangs. In the case of a PXI system with remote control through MXI, a lost MXI connection could result in unexpected Watchdog behavior and therefore improperly implemented Watchdog states.
Page 133: Connecting Digital I/O Signals
X Series Device Exceeding the maximum input voltage ratings, which are listed in each Caution X Series device specifications, can damage the DAQ device and the computer. NI is not liable for any damage resulting from such signal connections. 6-24 | ni.com...
Page 134: Getting Started With Dio Applications In Software
NI-DAQmx Help or the LabVIEW Help. X Series devices use the NI-DAQmx driver. NI-DAQmx includes a collection of programming examples to help you get started developing an application. You can modify example code and save it in an application.
Page 135 Counters X Series devices have four general-purpose 32-bit counter/timers and one frequency generator. The general-purpose counter/timers can be used for many measurement and pulse generation applications. Figure 7-1 shows the X Series Counter 0 and the frequency generator. All four counters on X Series devices are identical. Figure 7-1.
Page 136: Counters
All hardware-timed single point (HWTSP) operations are sample clocked. Note Table 7-1. Counter Timing Measurements Implicit Timing Sample Clocked Measurement Support Timing Support Buffered Edge Count Buffered Pulse Width Buffered Pulse Buffered Semi-Period 7-2 | ni.com...
Page 137: Counter Input Applications
X Series User Manual Table 7-1. Counter Timing Measurements (Continued) Implicit Timing Sample Clocked Measurement Support Timing Support Buffered Frequency Buffered Period Buffered Position Buffered Two-Signal Edge Separation Counter Input Applications The following sections list the various counter input applications available on X Series devices: •...
Page 138: Single Point (On-Demand) Edge Counting
The count values returned are the cumulative counts since the counter armed event. That is, the sample clock does not reset the counter. You can configure the counter to sample on the rising or falling edge of the sample clock. 7-4 | ni.com...
Page 139: Controlling The Direction Of Counting
X Series User Manual Figure 7-4 shows an example of buffered edge counting. Notice that counting begins when the counter is armed, which occurs before the first active edge on Sample Clock. Figure 7-4. Buffered (Sample Clock) Edge Counting Counter Armed Sample Clock (Sample on Rising Edge) SOURCE...
Page 140: Single Pulse-Width Measurement
The counter counts the number of edges on the Source input while the Gate input remains active. On each trailing edge of the Gate signal, the counter stores the count in the counter FIFO. A DMA controller transfers the stored values to host memory. 7-6 | ni.com...
Page 141: Sample Clocked Buffered Pulse-Width Measurement
A hardware-timed single point (HWTSP) pulse-width measurement has the same behavior as a sample clocked buffered pulse-width measurement. If a pulse does not occur between sample clocks, an overrun error occurs. Note USB X Series devices do not support Note (NI USB-634 /635 /636 Devices) hardware-timed single point (HWTSP) operations.
Page 142: Pulse Measurement
The counter begins counting when it is armed. The arm usually occurs between edges on the Gate input, but the counting does not start until the desired edge. You can select whether to read the high pulse or low pulse first using the StartingEdge property in NI-DAQmx. 7-8 | ni.com...
Page 143: Sample Clocked Buffered Pulse Measurement
A hardware-timed single point (HWTSP) pulse measurement has the same behavior as a sample clocked buffered pulse measurement. If a pulse does not occur between sample clocks, an overrun error occurs. Note USB X Series devices do not support Note (NI USB-634 /635 /636 Devices) hardware-timed single point (HWTSP) operations.
Page 144: Pulse Versus Semi-Period Measurements
Refer to the following sections for more information about X Series semi-period measurement options: • Single Semi-Period Measurement • Implicit Buffered Semi-Period Measurement Refer to the Pulse versus Semi-Period Measurements section for information about the differences between semi-period measurement and pulse measurement. 7-10 | ni.com...
Page 145: Single Semi-Period Measurement
The counter begins counting when it is armed. The arm usually occurs between edges on the Gate input. You can select whether to read the first active low or active high semi period using the CI.SemiPeriod.StartingEdge property in NI-DAQmx. Figure 7-11 shows an example of an implicit buffered semi-period measurement.
Page 146: Low Frequency With One Counter
Route the signal to measure (fx) to the Source of the counter. Configure the counter for a single pulse-width measurement. If you measure the width of pulse T to be N periods of fx, the frequency of fx is N/T. 7-12 | ni.com...
Page 147: Large Range Of Frequencies With Two Counters
X Series User Manual Figure 7-13 illustrates this method. Another option is to measure the width of a known period instead of a known pulse. Figure 7-13. High Frequency with Two Counters Width of Pulse (T ) Pulse Pulse Gate …...
Page 148: Sample Clocked Buffered Frequency Measurement
Measure CTR_1_SOURCE NI-DAQmx then routes the Counter 0 Internal Output signal to the gate of Counter 1. You can then route a signal of known frequency (fk) as a counter timebase to the Counter 1 Source input. NI-DAQmx configures Counter 1 to perform a single pulse-width measurement. Suppose the result is that the pulse width is J periods of the fk clock.
Page 149 X Series User Manual A sample clocked buffered frequency measurement with CI.Freq.EnableAveraging set to True uses the embedded counter and a sample clock to perform a frequency measurement. For each sample clock period, the embedded counter counts the signal to measure (fx) and the primary counter counts the internal time-base of a known frequency (fk).
Page 150: Hardware-Timed Single Point Frequency Measurement
Source Sample Clock Latched Value USB X Series devices do not support Note (NI USB-634 /635 /636 Devices) hardware-timed single point (HWTSP) operations. Choosing a Method for Measuring Frequency The best method to measure frequency depends on several factors including the expected frequency of the signal to measure, the desired accuracy, how many counters are available, and how long the measurement can take.
Page 151 X Series User Manual Here is how these variables apply to each method, summarized in Table 7-2. • One counter—With one counter measurements, a known timebase is used for the source frequency (fk). The measurement time is the period of the frequency to be measured, or 1/fx.
Page 152 Sample High Variable Clocked Counter Frequency Large Range 100 M 100 M 1,000 100 M Measurement time (ms) .0002 — — — 5,000 Max. Frequency error 50.01 263 k 1,000 (Hz) Max. Error % .001 5.26 .001 7-18 | ni.com...
Page 153 X Series User Manual Again the measurement time for the one counter measurement is lowest, but the accuracy is lower. Note that the accuracy and measurement time of the sample clocked and two counter large range are almost the same. The advantage of the sample clocked method is that even when the frequency to measure changes, the measurement time does not and error percentage varies little.
Page 154: Period Measurement
You can calculate the period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter. Period measurements return the inverse results of frequency measurements. Refer to the Frequency Measurement section for more information. 7-20 | ni.com...
Page 155: Position Measurement
X Series User Manual Position Measurement You can use the counters to perform position measurements with quadrature encoders or two-pulse encoders. You can measure angular position with X1, X2, and X4 angular encoders. Linear position can be measured with two-pulse encoders. You can choose to do either a single point (on-demand) position measurement or a buffered (sample clock) position measurement.
Page 156 After the reload occurs, the counter continues to count as before. Figure 7-21 illustrates channel Z reload with X4 decoding. Figure 7-21. Channel Z Reload with X4 Decoding Ch A Ch B Ch Z Max Timebase Counter Value A = 0 B = 0 Z = 1 7-22 | ni.com...
Page 157: Measurements Using Two Pulse Encoders
X Series User Manual Measurements Using Two Pulse Encoders The counter supports two pulse encoders that have two channels—channels A and B. The counter increments on each rising edge of channel A. The counter decrements on each rising edge of channel B, as shown in Figure 7-22. Figure 7-22.
Page 158: Hardware-Timed Single Point Position Measurement
Hardware-Timed Single Point Position Measurement A hardware-timed single point (HWTSP) position measurement has the same behavior as a buffered (sample clock) position measurement. X Series USB devices do not support Note (NI USB-634 /635 /636 Devices) hardware-timed single point (HWTSP) operations.
Page 159: Implicit Buffered Two-Signal Edge-Separation Measurement
X Series User Manual Figure 7-24 shows an example of a single two-signal edge-separation measurement. Figure 7-24. Single Two-Signal Edge-Separation Measurement Counter Armed Measured Interval GATE SOURCE Counter Value Latched Value Implicit Buffered Two-Signal Edge-Separation Measurement Implicit buffered and single two-signal edge-separation measurements are similar, but implicit buffered measurement measures multiple intervals.
Page 160: Hardware-Timed Single Point Two-Signal Separation Measurement
If an active edge on the Gate and an active edge on the AUX does not occur Note between sample clocks, an overrun error occurs. USB X Series devices do not support Note (NI USB-63 Devices) hardware-timed single point (HWTSP) operations. For information about connecting counter signals, refer to the Default Counter/Timer Pins section.
Page 161: Simple Pulse Generation
X Series User Manual Simple Pulse Generation Refer to the following sections for more information about the X Series simple pulse generation options: • Single Pulse Generation • Single Pulse Generation with Start Trigger Single Pulse Generation The counter can output a single pulse. The pulse appears on the Counter n Internal Output signal of the counter.
Page 162: Pulse Train Generation
When the embedded counter reaches the specified tick count, it generates a trigger that stops the primary counter generation. Figure 7-29. Finite Pulse Train Generation: Four Ticks Initial Delay, Four Pulses Counter Armed Source Enablex Ctrx 7-28 | ni.com...
Page 163: Retriggerable Pulse Or Pulse Train Generation
X Series User Manual In Legacy Mode, the counter operation requires two counters and does not use the embedded counter. For example, to generate four pulses on Counter 0, Counter 0 generates the pulse train, which is gated by the paired second counter. The paired counter, Counter 1, generates a pulse of desired width.
Page 164: Continuous Pulse Train Generation
You specify the high and low pulse widths of the output signal. The pulse widths are also measured in terms of a number of active edges of the Source input. You can also specify the active edge of the Source input (rising or falling). 7-30 | ni.com...
Page 165: Buffered Pulse Train Generation
X Series User Manual The counter can begin the pulse train generation as soon as the counter is armed, or in response to a hardware Start Trigger. You can route the Start Trigger to the Gate input of the counter. You can also use the Gate input of the counter as a Pause Trigger (if it is not used as a Start Trigger).
Page 166: Continuous Buffered Implicit Pulse Train Generation
When a sample clock occurs, the current pulse (idle followed by active) finishes generation and the next pulse updates with the next sample specifications. When the last sample is generated, the pulse train continues to generate with Note these specifications until the task is stopped. 7-32 | ni.com...
Page 167: Continuous Buffered Sample Clocked Pulse Train Generation
X Series User Manual Table 7-7 and Figure 7-35 detail a finite sample clocked generation of three samples where the pulse specifications from the create channel are two ticks idle, two ticks active, and three ticks initial delay. Table 7-7. Finite Buffered Sample Clocked Pulse Train Generation Sample Idle Ticks Active Ticks...
Page 168: Frequency Generation
(Divisor = 5) Frequency Output can be routed out to any PFI <0..15> or RTSI <0..7> terminal. All PFI terminals are set to high-impedance at startup. The FREQ OUT signal can also be routed to many internal timing signals. 7-34 | ni.com...
Page 169: Frequency Division
X Series User Manual In software, program the frequency generator as you would program one of the counters for pulse train generation. For information about connecting counter signals, refer to the Default Counter/Timer Pins section. Frequency Division The counters can generate a signal with a frequency that is a fraction of an input signal. This function is equivalent to continuous pulse train generation.
Page 170: Counter Timing Signals
Table 7-8 lists how the terminal is used in various applications. Table 7-8. Counter Applications and Counter n Source Application Purpose of Source Terminal Pulse Generation Counter Timebase One Counter Time Measurements Counter Timebase 7-36 | ni.com...
Page 171: Routing A Signal To Counter N Source
X Series User Manual Table 7-8. Counter Applications and Counter n Source Application Purpose of Source Terminal Two Counter Time Measurements Input Terminal Non-Buffered Edge Counting Input Terminal Buffered Edge Counting Input Terminal Two-Edge Separation Counter Timebase Routing a Signal to Counter n Source Each counter has independent input selectors for the Counter n Source signal.
Page 172: Routing A Signal To Counter N Gate
Counter n Aux input: • RTSI <0..7> • PFI <0..15> • AI Reference Trigger (ai/ReferenceTrigger) • AI Start Trigger (ai/StartTrigger) • PXI_STAR • PXIe_DSTAR<A,B> • Analog Comparison Event • Change Detection Event 7-38 | ni.com...
Page 173: Counter N A, Counter N B, And Counter N Z Signals
X Series User Manual In addition, a counter’s Internal Output, Gate or Source can be routed to a different counter’s Aux. A counter’s own gate can also be routed to its Aux input. Some of these options may not be available in some driver software. Counter n A, Counter n B, and Counter n Z Signals Counter n B can control the direction of counting in edge counting applications.
Page 174: Routing Signals To Counter N Hw Arm Input
• DI Change Detection output Several other internal signals can be routed to Counter n Sample Clock through internal routes. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. 7-40 | ni.com...
Page 175: Using An External Source
X Series User Manual Using an External Source You can route any of the following signals as Counter n Sample Clock: • PFI <0..15> • RTSI <0..7> • PXI_STAR • PXIe_DSTAR<A,B> • Analog Comparison Event You can sample data on the rising or falling edge of Counter n Sample Clock. Routing Counter n Sample Clock to an Output Terminal You can route Counter n Sample Clock out to any PFI <0..15>...
Page 176: Default Counter/Timer Pins
Counters Default Counter/Timer Pins By default, NI-DAQmx routes the counter/timer inputs and outputs to the PFI pins. Refer to Table 7-9 for the default NI-DAQmx counter/timer outputs for PCI Express, PXI Express, USB Mass Termination, and USB BNC devices. Refer to Table 7-10 for the default NI-DAQmx counter/timer outputs for USB Screw Terminal devices.
Page 177 X Series User Manual Table 7-9. X Series PCI Express/PXI Express/USB Mass Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins (Continued) Counter/Timer Signal Default Connector 0 Pin Number (Name) CTR 2 A 11 (PFI 0) CTR 2 Z 10 (PFI 1)
Page 178 You can use these defaults or select other sources and destinations for the counter/timer signals in NI-DAQmx. Refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help for more information about how to connect your signals for common counter measurements and generations.
Page 179: Counter Triggering
X Series User Manual Counter Triggering Counters support three different triggering actions: • Arm Start Trigger—To begin any counter input or output function, you must first enable, or arm, the counter. Software can arm a counter or configure counters to be armed on a hardware signal.
Page 180: Prescaling
Depending on how you configure your device, X Series devices use one of three synchronization methods: • 100 MHz Source Mode • External Source Greater than 25 MHz • External or Internal Source Less than 25 MHz 7-46 | ni.com...
Page 181: 100 Mhz Source Mode
X Series User Manual 100 MHz Source Mode In 100 MHz source mode, the device synchronizes signals on the rising edge of the source, and counts on the third rising edge of the source. Edges are pipelined so no counts are lost, as shown in Figure 7-40.
Page 182: Pfi
X Series devices have up to 16 Programmable Function Interface (PFI) signals. In addition, X Series devices have up to 32 lines of bidirectional DIO signals. Each PFI can be individually configured as the following: • A static digital input •...
Page 183: Using Pfi Terminals As Timing Input Signals
Most functions allow you to configure the polarity of PFI inputs and whether the input is edge or level sensitive. PXIe-6386 and PXIe-6396 devices differ in Note NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about sample clock rates related to these devices, go to and enter the Info Code ni.com/info...
Page 184: Using Pfi Terminals As Static Digital I/Os
Note signals are active low. PXIe-6386 and PXIe-6396 devices differ in Note NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about sample clock rates related to these devices, go to and enter the Info Code ni.com/info smio14ms.
Page 185: Using Pfi Terminals To Digital Detection Events
PXIe_DSTAR<A,B> signal. When the filters are enabled, your device samples the input on each rising edge of a filter clock. X Series devices use an onboard oscillator to generate the filter clock. The following is an example of low to high transitions of the input signal. High-to-low transitions work similarly. 8-4 | ni.com...
Page 186 X Series User Manual Assume that an input terminal has been low for a long time. The input terminal then changes from low to high, but glitches several times. When the filter clock has sampled the signal high on N consecutive edges, the low to high transition is propagated to the rest of the circuit. The value of N depends on the filter setting;...
Page 187: I/O Protection
• An output driving a 1 Refer to the NI-DAQmx Help or the LabVIEW Help for more information about setting power-up states in NI-DAQmx or MAX. When using your X Series device to control an SCXI chassis, DIO lines 0, 1,...
Page 188: Digital Routing And Clock Generation
Timebase 100 kHz ÷ PXIe-DSTAR<A, B> Timebase PXIe-6386 and PXIe-6396 devices only Note (NI PXIe-6386/6396 Devices) support PXIe_CLK100 and the onboard oscillator. For more information about special considerations for these devices, go to and enter the Info ni.com/info Code smio14ms...
Page 189: 100 Mhz Timebase
• PXI_STAR • PXIe_DSTAR<A,B> PXIe-6386 and PXIe-6396 devices differ in Note (NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about these devices related to external reference clocks, go to and enter the Info Code ni.com/info smio14ms The external reference clock is an input to a Phase-Lock Loop (PLL).
Page 190: 10 Mhz Reference Clock
PXI_STAR with a clock signal. Each target device routes PXI_STAR to its external reference clock. PXIe-6386 and PXIe-6396 devices differ in Note (NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about these devices related to synchronization, go to and enter the Info Code ni.com/info...
Page 191: Usb Devices
In a PXI Express system, the RTSI bus is replaced by the PXI and PXI Express trigger signals on the PXI Express backplane. This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system. USB devices do not support the RTSI bus. 9-4 | ni.com...
Page 192: Rtsi Connector Pinout
X Series User Manual RTSI Connector Pinout Figure 9-2 shows the RTSI connector pinout and Table 9-1 (NI PCI Express Devices) describes the RTSI signals. Figure 9-2. PCI Express RTSI Pinout Terminal 34 Terminal 33 Terminal 2 Terminal 1 Table 9-1. RTSI Signals...
Page 193: Using Rtsi As Outputs
Each RTSI terminal can be routed to any of the following signals: • AI Convert Clock (ai/ConvertClock) • AI Sample Clock (ai/SampleClock) • AI Start Trigger (ai/StartTrigger) • AI Reference Trigger (ai/ReferenceTrigger) • AI Pause Trigger (ai/PauseTrigger) • AI Sample Clock Timebase (ai/SampleClockTimebase) 9-6 | ni.com...
Page 194: Rtsi Filters
X Series User Manual • AO Start Trigger (ao/StartTrigger) • AO Sample Clock (ao/SampleClock) • AO Sample Clock Timebase (ao/SampleClockTimebase) • AO Pause Trigger (ao/PauseTrigger) • Counter input signals for all counters—Source, Gate, Aux, HW_Arm, A, B, or Z • DI Sample Clock (di/SampleClock) •...
Page 195: Pxi_Clk10
PXI system, but the system will not be able to use the Star Trigger feature. PXI_STAR Filters You can enable a programmable debouncing filter on each PFI, RTSI, PXIe_DSTAR, or PXI_STAR signal. Refer to the PFI Filters section of Chapter 8, PFI, for more information. 9-8 | ni.com...
Page 196: Pxie_Dstar
X Series User Manual PXIe_DSTAR<A..C> PXI Express devices can provide high-quality and high-frequency point-to-point connections between each slot and a system timing slot. These connections come in the form of three low-voltage differential star triggers that create point-to-point, high-frequency connections between a PXI Express system timing module and a peripheral device.

Page 197: Bus Interface
CPU. This method makes DMA the fastest available data transfer method. NI uses DMA hardware and software technology to achieve high throughput rates and increase system utilization. DMA is the default method of data transfer for PCI Express and PXI Express devices.
Page 198: Usb Device Data Transfer Methods
USB Signal Stream—USB Signal Stream is a method to transfer data between the device and computer memory using USB bulk transfers without intervention of the microcontroller on the NI device. NI uses USB Signal Stream hardware and software technology to achieve high throughput rates and increase system utilization in USB devices.
Page 199: Pxi Express Considerations
PXIe-6386 and PXIe-6396 devices differ in Note (NI PXIe-6386/6396 Devices) several ways from other SMIO devices. For more information about throughput considerations for these devices, go to and enter the Info Code ni.com/info...
Page 200: Data Throughput
If this occurs, NI-DAQmx software will stop the acquisition and return error -200361, “Onboard device memory overflow…” Buffer overflow errors can be prevented by using data compression and by ensuring the USB DAQ system has sufficient data bandwidth.
Page 201: Triggering With A Digital Source
Triggering A trigger is a signal that causes an action, such as starting or stopping the acquisition of data. When you configure a trigger, you must decide how you want to produce the trigger and the action you want the trigger to cause. All X Series devices support internal software triggering, as well as external digital triggering.
Page 202: Triggering With An Analog Source
(less than 1 kΩ source impedance). If APFI <0,1> are left unconnected, they are susceptible to crosstalk from adjacent terminals, which can cause false triggering. Note that the APFI <0,1> terminals can also be used for other functions such as the 11-2 | ni.com...
Page 203: Analog Input Channels
When the DAQ device is waiting for an analog trigger with a AI channel as the source, the AI muxes should not route different AI channels to the NI-PGIA. If a different channel is routed to the NI-PGIA, the trigger condition on the desired channel could be missed. The other channels could also generate false triggers.
Page 204: Routing Analog Comparison Event To An Output Terminal
Analog Edge Trigger with Hysteresis (Rising Slope)—When using hysteresis with a rising slope, you specify a trigger level and amount of hysteresis. The high threshold is the trigger level; the low threshold is the trigger level minus the hysteresis. 11-4 | ni.com...
Page 205 X Series User Manual For the trigger to assert, the signal must first be below the low threshold, then go above the high threshold. The trigger stays asserted until the signal returns below the low threshold. The output of the trigger detection circuitry is the internal Analog Comparison Event signal, as shown in Figure 11-6.
Page 206: Analog Trigger Accuracy
The DAQ device does not amplify the APFI <0, 1> signals. When using an AI channel, the NI-PGIA amplifies the AI channel signal before driving the analog trigger circuitry. If you configure the AI channel to have a small input range, you can trigger on very small voltage changes in the input signal.
Page 207: Device-Specific Information
Device-Specific Information This appendix contains device pinouts, specifications, cable and accessory choices, and other information for the following X Series devices: • NI 6320 • NI 6321/6341 • NI 6323/6343 • NI 6345/6355 • NI 6346 • NI 6349 •...
Page 208: Figure A-1. Ni Pcie-6320 Pinout
NI 6320 The following sections contain information about the NI PCIe-6320 device. NI 6320 Pinout Figure A-1 shows the pinout of the NI PCIe-6320 device. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information.
Page 209 Refer to the NI 632x Device Specifications for more detailed information about the NI 6320 device. NI 6320 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 210: Figure A-2. Ni Pcie-6321 And Ni Pcie/Pxie-6341 Pinout
The following sections contain information about the NI PCIe-6321, NI PCIe/PXIe-6341, and NI USB-6341 devices. NI 6321/6341 Pinouts Figure A-2 shows the pinout of the NI PCIe-6321 and NI PCIe/PXIe-6341 devices. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 211: Figure A-3. Ni Usb-6341 Screw Terminal Pinout
NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. Figure A-3 shows the pinout of the NI USB-6341 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 212: Figure A-4. Ni Usb-6341 Bnc Pinout
Appendix A Device-Specific Information Figure A-4 shows the pinout of the NI USB-6341 BNC. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-4. NI USB-6341 BNC Pinout D GND P0.0...
Page 213 PXIe-6341 • —USB-6341 Specifications USB-6341 NI 6321/6341 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for more information.
Page 214: Figure A-5. Ni Pcie-6323/6343 Pinout
The following sections contain information about the NI PCIe-6323, NI PCIe-6343, and NI USB-6343 devices. NI 6323/6343 Pinouts Figure A-5 shows the pinout of the NI PCIe-6323/6343. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the I/O Connector Signal...
Page 215: Figure A-6. Ni Usb-6343 Screw Terminal Pinout
X Series User Manual Figure A-6 shows the pinout of the NI USB-6343 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and Information. Figure A-6. NI USB-6343 Screw Terminal Pinout...
Page 216: Figure A-7. Ni Usb-6343 Bnc Pinout
Appendix A Device-Specific Information Figure A-7 shows the pinout of the NI USB-6343 BNC. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-7. NI USB-6343 BNC Pinout D GND P0.8...
Page 217 PCIe-6343 • —USB-6343 Specifications USB-6343 NI 6323/6343 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for more information.
Page 218: Figure A-8. Ni Pxie-6345/6355 Pinout
The following sections contain information about the NI PXIe-6345 and NI PXIe-6355 devices. NI 6345/6355 Pinouts Figure A-8 shows the pinout of the NI PXIe-6345 and NI PXIe-6355. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the...
Page 219 Refer to the NI 6355 Device Specifications for more detailed information about the NI 6355 device. NI 6345/6355 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 220: Figure A-9. Ni Pcie-6346 Pinout
The following sections contain information about the NI PCIe-6346. NI 6346 Pinout Figure A-9 shows the pinout of the NI PCIe-6346. The I/O signals appear on one 68-pin connector. For a detailed description of each signal, refer to the I/O Connector Signal...
Page 221: Figure A-10. Ni Usb 6346 Screw Terminal Pinout
X Series User Manual Figure A-10. NI USB 6346 Screw Terminal Pinout AI 4+ PFI 8/P2.0 P0.0 AI 0+ AI 4– D GND P0.1 AI 0– AI GND PFI 9/P2.1 P0.2 AI GND AI 5+ D GND P0.3 AI 1+ AI 5–...
Page 222: Figure A-11. Ni Usb 6346 Bnc Pinout
Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. A-16 | ni.com...
Page 223 Refer to the NI 6346 Device Specifications for more detailed information about the NI 6346 device. NI 6346 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 224: Figure A-12. Ni Pxie-6349 Pinout
The following sections contain information about the NI PXIe-6349. NI 6349 Pinouts Figure A-12 shows the pinout of the NI PXIe-6349. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the I/O Connector Signal...
Page 225: Figure A-13. Ni Usb-6349 Screw Terminal Pinout
X Series User Manual Figure A-13. NI USB-6349 Screw Terminal Pinout AI 4+ AI 14+ AI 0+ AI 8+ AI 4– AI 14– AI 0– AI 8– AI GND AI GND AI GND AI GND AI 5+ AI 15+ AI 1+ AI 9+ AI 5–...
Page 226 Refer to the NI 6349 Device Specifications for more detailed information about the NI 6349 device. NI 6349 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 227: Figure A-14. Ni Pcie-6351 And Ni Pcie/Pxie-6361 Pinout
The following sections contain information about the NI PCIe 6351, NI USB-6351 Screw Terminal, NI PCIe/PXIe-6361, and NI USB-6361 devices. NI 6351/6361 Pinout Figure A-14 shows the pinout of the NI PCIe-6351 and NI PCIe/PXIe-6361. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 228: Figure A-15. Ni Usb-6351/6361 Screw Terminal Pinout
NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. Figure A-15 shows the pinout of the NI USB-6351/6361 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 229: Figure A-16. Ni Usb-6361 Mass Termination Pinout
X Series User Manual Figure A-16 shows the pinout of the NI USB-6361 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-16. NI USB-6361 Mass Termination Pinout...
Page 230 NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. Figure A-17 shows the pinout of the NI USB-6361 BNC. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 231: Figure A-17. Ni Usb-6361 Bnc Pinout
Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. © National Instruments | A-25...
Page 232 Refer to the NI 6361 Device Specifications for more detailed information about the NI 6361 device. NI 6351/6361 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 233: Figure A-18. Ni Pcie-6353 And Ni Pcie/Pxie-6363 Pinout
Terminal, NI PCIe/PXIe-6363, and NI USB-6363 devices. NI 6353/6363 Pinouts Figure A-18 shows the pinout of the NI PCIe-6353 and NI PCIe/PXIe-6363. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the...
Page 234: Figure A-19. Ni Usb-6363 Mass Termination Pinout
Appendix A Device-Specific Information Figure A-19 shows the pinout of the NI USB-6363 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-19. NI USB-6363 Mass Termination Pinout...
Page 235 Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. © National Instruments | A-29...
Page 236: Figure A-20. Ni Usb-6353/6363 Screw Terminal Pinout
Appendix A Device-Specific Information Figure A-20 shows the pinout of the NI USB-6353/6363 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-20. NI USB-6353/6363 Screw Terminal Pinout...
Page 237: Figure A-21. Ni Usb-6363 Pinout
For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. Figure A-21 shows the pinout of the NI USB-6363 BNC. For a detailed description of each signal, refer to the...
Page 238 PXIe-6363 • —USB-6363 Specifications USB-6363 NI 6353/6363 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for more information.
Page 239 Info Code ni.com/info smio14ms NI 6356/6366/6376/6386/6396 Pinouts Figure A-22 shows the pinout of the NI PCIe-6376 and PXIe-6356/6366/6376/6386/6396. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information.
Page 240 Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. A-34 | ni.com...
Page 241: Figure A-23. Ni Usb-6366 Mass Termination Pinout
X Series User Manual Figure A-23 shows the pinout of the NI USB-6366 Mass Termination. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-23. NI USB-6366 Mass Termination Pinout...
Page 242: Figure A-24. Ni Usb-6356/6366 Screw Terminal Pinout
NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. Figure A-24 shows the pinout of the NI USB-6356/6366 Screw Terminal. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions...
Page 243: Figure A-25. Ni Usb-6356/6366 Bnc Pinout
X Series User Manual Figure A-25 shows the pinout of the NI USB-6356/6366 BNC. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information. Figure A-25. NI USB-6356/6366 BNC Pinout D GND P0.0...
Page 244 • —PCIe-6396 Specifications PXIe-6396 NI 6356/6366/6376/6386/6396 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories section of Chapter 2, DAQ System Overview, for more information.
Page 245: Figure A-26. Ni Pxie-6358/6368/6378 Pinout
The following sections contain information about the NI PXIe-6358, NI PXIe-6368, and NI PXIe-6378 devices. NI 6358/6368/6378 Pinout Figure A-26 shows the pinout of the NI PXIe-6358/6368/6378. The I/O signals appear on two 68-pin connectors. For a detailed description of each signal, refer to the I/O Connector...
Page 246 NI 6368 device. Refer to the NI 6378 Device Specifications for more detailed information about the NI 6378 device. NI 6358/6368/6378 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 247: Figure A-27. Ni Pxie-6365 Connector 2 Pinout
The following sections contain information about the NI PXIe-6365 device. NI 6365 Pinout Figure A-27 and Figure A-28 show the pinouts of the NI PXIe-6365. The I/O signals appear on three 68-pin connectors. For a detailed description of each signal, refer to the...
Page 248: Figure A-28. Ni Pxie-6365 Connector 0 And Connector 1 Pinout
Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help.
Page 249 Refer to the NI 6365 Device Specifications for more detailed information about the NI 6365 device. NI 6365 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 250: Figure A-29. Ni Pcie-6374 Pinout
NI 6374 The following sections contain information about the NI PCIe-6374 device. NI 6374 Pinouts Figure A-29 shows the pinout of the NI PCIe-6374. For a detailed description of each signal, refer to the I/O Connector Signal Descriptions section of Chapter 3, Connector and LED Information.
Page 251 Refer to the PCIe-6374 Specifications for more detailed information about the NI 6374 device. NI 6374 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 252: Figure A-30. Ni Pxie-6375 Connector 2 And Connector 3 Pinout
The following sections contain information about the NI PXIe-6375 device. NI 6375 Pinout Figures A-30 and Figure A-31 show the pinouts of the NI PXIe-6375. The I/O signals appear on four 68-pin connectors. For a detailed description of each signal, refer to the...
Page 253: Figure A-31. Ni Pxie-6375 Connector 0 And Connector 1 Pinout
Termination/USB BNC Device Default NI-DAQmx Counter/Timer Pins, for a list of the default NI-DAQmx counter/timer pins for this device. For more information about default NI-DAQmx counter inputs, refer to Connecting Counter Signals in the NI-DAQmx Help or the LabVIEW Help. © National Instruments | A-47...
Page 254 Refer to the NI 6375 Device Specifications for more detailed information about the NI 6375 device. NI 6375 Accessory and Cabling Options NI offers a variety of accessories and cables to use with your DAQ device. Refer to the Cables and Accessories...
Page 255: Where To Go From Here
To run examples without the device installed, use an NI-DAQmx simulated device. For more information, in Measurement & Automation Explorer (MAX), select Help»Help Topics» NI-DAQmx»MAX Help for NI-DAQmx and search for simulated devices. Related Documentation Each application software package and driver includes information about writing applications for taking measurements and controlling measurement devices.
Page 256 LabVIEW, including common measurements, measurement fundamentals, NI-DAQmx key concepts, and device considerations. LabVIEW NXG Refer to the Taking NI-DAQmx Measurements lessons to assist in getting started in LabVIEW NXG, beginning with NI-DAQmx API Basics. To access these lessons, enter taking in the Search bar in LabVIEW NXG.
Page 257 X Series User Manual Microsoft Visual Studio Support You can use the NI-DAQmx .Net class library to communicate with and control an NI data acquisition (DAQ) device. Documentation for the NI-DAQmx .NET class library is available by selecting Start»All Programs»National Instruments»NI-DAQmx»NI-DAQmx Documentation and then opening the NINETDAQmxFxXX.chm help file corresponding to the...
Page 258 Appendix B Where to Go from Here Training Courses If you need more help getting started developing an application with NI products, NI offers training courses. To enroll in a course or obtain a detailed course outline, refer to ni.com/...
Page 259 Troubleshooting This section contains common questions about X Series devices. If your questions are not answered here, refer to ni.com/support Analog Input I am seeing crosstalk, or ghost voltages, when sampling multiple channels. What does this mean? You may be experiencing a phenomenon called charge injection, which occurs when you sample a series of high-output impedance sources with a multiplexer.
Page 260: Appendix C Troubleshooting
Visit for more ni.com/support information about reducing glitches. Counters How do I connect counter signals to my X Series device? Default Counter/Timer Pins section of Chapter 7, Counters, has information about counter signal connections. C-2 | ni.com...
Page 261: Ni Services
– Warranty and Repair—All NI hardware features a one-year standard warranty that is extendable up to five years. NI offers repair services performed in a timely manner by highly trained factory technicians using only original parts at a National Instruments service center.
Page 262 KnowledgeBase, product manuals, step-by-step troubleshooting wizards, thousands of example programs, tutorials, application notes, instrument drivers, and so on. Registered users also receive access to the NI Discussion Forums . NI Applications Engineers make sure every question submitted ni.com/forums...
Page 263 NI 6320, A-3 Simultaneous MIO X Series devices, NI 6321/6341, A-7 4-50 NI 6323/6343, A-11 AI Pause Trigger signal NI 6345/6355, A-13, A-17, A-20 MIO X Series devices, 4-34 NI 6351/6361, A-26 Simultaneous MIO X Series devices, NI 6353/6363, A-32 4-55...
Page 264 4-38 crosstalk when sampling multiple methods, 4-38 channels, C-1 fundamentals, 4-36 differential, troubleshooting, C-1 overview, 4-36 ghost voltages when sampling multiple signals, 4-45 channels, C-1 terminal configuration, 4-37 MIO X Series devices, 4-1 timing signals, 4-45 I-2 | ni.com...
Page 265 NI 6320, A-3 Simultaneous MIO X Series devices, NI 6321/6341, A-7 4-36 NI 6323/6343, A-11 ANSI C documentation, B-3 NI 6345/6355, A-13, A-17, A-20 AO FIFO, 5-1 NI 6351/6361, A-26 AO Pause Trigger signal, 5-7 NI 6353/6363, A-32 AO reference selection, 5-1...
Page 266 NI PCIe-6321, A-4 signal rejection considerations NI PCIe-6323/6343, A-8 differential ground-referenced NI PCIe-6351, A-21 signals (Simultaneous MIO X NI PCIe-6353 Screw Terminal, A-27 Series devices), 4-42 NI PCIe-6374, A-44 configuring AI ground-reference settings in NI PCIe-6376, A-33 software NI PXIe-6345/6355, A-12, A-14, A-18...
Page 267 NI USB-6343 BNC, A-10 FREQ OUT, 8-41 NI USB-6351/6361 Screw Terminal, Frequency Output, 8-41 A-22 counters, 8-1 NI USB-6353 Mass Termination, A-28 cascading, 8-45 NI USB-6356/6366 Screw Terminal, connecting terminals, 8-42 A-36 edge counting, 8-3 NI USB-6361 Mass Termination, A-23...
Page 268 MIO X Series devices, 4-18 MIO X Series devices), 4-43 digital default waveform acquisition, 6-4 counter terminals, 8-42 waveform generation, 6-13 NI-DAQmx counter/timer pins, 8-42 digital I/O pins, 8-42 block diagram, 6-1 desktop use, 1-7 circuitry, 6-1 device connecting signals, 6-24...
Page 269 X Series User Manual MIO X Series devices, 4-9 using in differential mode Simultaneous MIO X Series devices, MIO X Series devices, 4-13 4-39 using in NRSE mode MIO X Series devices, 4-16 using in RSE mode MIO X Series devices, 4-17 edge counting, 8-3 when to use in differential mode buffered, 8-4...
Page 270 NI PCIe-6374 pinout, A-44 MIO X Series devices, 4-4 NI PCIe-6376 pinout, A-33 MIO X Series devices, 4-1, 4-4 NI PXIe-6345/6355 pinout, A-12, A-14, ground-referenced signal sources A-18 connecting NI PXIe-6356/6366/6376 pinout, A-33 MIO X Series devices, 4-17...
Page 271 NI 6343 pulse-width, 8-5 USB BNC pinout, A-10 semi-period, 8-10 USB pinout, A-10 single pulse-width, 8-6 NI 6345/6355, A-12, A-14, A-18 single semi-period, 8-11 accessory options, A-13, A-17, A-20 single two-signal edge-separation, 8-24 cabling options, A-13, A-17, A-20 two-signal edge-separation, 8-24...
Page 272 A-40 NRSE connections NI 6363 using with floating signal sources, 4-16 USB BNC pinout, A-31 using with ground-referenced signal NI 6365, A-41 sources, 4-20 accessory options, A-43 when to use with floating signal sources, cabling options, A-43 4-12 pinout, A-41...
Page 273 9-8 NI PCIe-6320, A-2 PXI Express NI PCIe-6321, A-4 and PXI, 10-3 NI PCIe-6323/6343, A-8 chassis compatibility, 10-3 NI PCIe-6351/6361, A-21, A-22, A-23, clock, 10-3 A-28 clock and trigger signals, 9-7 NI PCIe-6353/6363, A-27 considerations, 10-3 NI PCIe-6374, A-44...
Page 274 Simultaneous MIO X Series single, 8-11 devices, 4-49 sensors, 2-8 AI Start Trigger settings MIO X Series devices, 4-30 analog input ground-reference Simultaneous MIO X Series MIO X Series devices, 4-4 devices, 4-50 AO reference selection, 5-2 I-12 | ni.com...
Page 275 Counter n Sample Clock, 8-40 NI 6320, A-3 Counter n Source, 8-36 NI 6321/6341, A-7 Counter n TC, 8-41 NI 6345/6355, A-13, A-17, A-20 Counter n Up_Down, 8-39 NI 6351/6361, A-26 Counter n Z, 8-39 NI 6353/6363, A-32 counters, 8-36...
Page 276 Simultaneous MIO X Series 8-24 devices, 4-36 buffered, 8-25 terminals single, 8-24 connecting counter, 8-42 types of analog triggers, 11-4 NI-DAQmx default counter, 8-42 Timebase 100 kHz, 9-2 100 MHz, 9-2 USB BNC, 1-7 20 MHz, 9-2 USB BNC devices, 1-5 timed acquisitions...
Page 277 X Series User Manual waveform generation digital, 6-13 signals, 5-5 wiring Simultaneous MIO X Series devices, 4-44 working voltage range Simultaneous MIO X Series devices, 4-3, 4-38 X Series accessories and cables, 1-10 accessory options, 2-4 cabling options, 2-4 information, A-1 pinouts, 1-10 specifications, 1-10 USB devices, 1-5...

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NI DAQ X Series User Manual

Chapter 1

Chapter 2

Chapter 3

Chapter 4

Chapter 5

Chapter 6

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