NXP Semiconductors MMPF0100 Programming Instructions Manual
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NXP Semiconductors MMPF0100 Programming Instructions Manual

NXP Semiconductors MMPF0100 Programming Instructions Manual

One-time programmable
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Freescale Semiconductor
Application Note
MMPF0100 OTP Programming Instructions
1

Introduction

This document provides a detailed description of the
One-Time Programmable (OTP) function of the MMPF0100. It
provides the system requirements and instructions to program
the fuses for a selected power-up configuration. All examples
assume the customer is using silicon revision P1.1 or higher.
Freescale analog ICs are manufactured using the
SMARTMOS process, a combinational BiCMOS
manufacturing flow that integrates precision analog, power
functions and dense CMOS logic together on a single
cost-effective die.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 OTP Overview. . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.1 Power-up Configuration. . . . . . . . . . . . . . . . 2
2.2 OTP Programming Example . . . . . . . . . . . . 3
2.3 Try-Before-Buy Mode Example . . . . . . . . . . 8
2.4 OTP Registers Description . . . . . . . . . . . . 10
(ECC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Hardware Considerations . . . . . . . . . . . . . . . . 28
Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2 Isolating SCL/SDA. . . . . . . . . . . . . . . . . . . 29
4 References . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5 Revision History . . . . . . . . . . . . . . . . . . . . . . . 35
AN4536
Rev. 3.0, 1/2014

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Summary of Contents for NXP Semiconductors MMPF0100

  • Page 1: Table Of Contents

    This document provides a detailed description of the One-Time Programmable (OTP) function of the MMPF0100. It 2 OTP Overview......2 provides the system requirements and instructions to program 2.1 Power-up Configuration.

  • Page 2: Otp Overview

    In the TBB mode, TBBOTP registers are directly written to and used for startup of the MMPF0100. Contents of the TBBOTP registers can be maintained in the absence of the main input supply, VIN, by using a coin cell at the LICELL pin.

  • Page 3: Otp Programming Example

    The One-Time-Programmable memory is realized using fuses. The startup configuration can be programmed into the MMPF0100 by changing the state of these fuses as required during the OTP programming process. There are 10 banks of fuses with each bank consisting of 26 fuses. Of the 26 fuses in a bank, 20 are programmable by the user.
  • Page 4 OTP Overview WRITE_I2C:B1:03 // Sw3A Sequence = 3 WRITE_I2C:B2:05 // Sw3A Freq = 2 MHZ, Mode = Single phase WRITE_I2C:B4:2C // Sw3B Voltage = 1.500 V WRITE_I2C:B5:03 // Sw3B Sequence = 3 WRITE_I2C:B6:01 // Sw3B Freq = 2 MHZ WRITE_I2C:B8:6F // Sw4 Voltage = 3.150 V WRITE_I2C:B9:06 // Sw4 Sequence = 6...
  • Page 5 OTP Overview WRITE_I2C:D0:1F // Set Auto ECC for fuse banks 1 to 5 WRITE_I2C:D1:1F // Set Auto ECC for fuse banks 6 to 10 //--------------------------------------------------------------------------- WRITE_I2C:F1:00 // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F2:00 // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F3:00 // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:00...
  • Page 6 OTP Overview //--------------------------------------------------------------------------- // BANK 4 //--------------------------------------------------------------------------- WRITE_I2C:F4:03 // Set Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:0B // Set Bank 4 ANTIFUSE_EN DELAY:100 // Allow 100ms for PF0100A. Use 50 ms for PF0100. WRITE_I2C:F4:03 // Reset Bank 4 ANTIFUSE_EN WRITE_I2C:F4:00 // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //--------------------------------------------------------------------------- // BANK 5...
  • Page 7 OTP Overview WRITE_I2C:F9:03 // Set Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F9:0B // Set Bank 9 ANTIFUSE_EN DELAY:100 // Allow 100 ms for PF0100A. Use 50 ms for PF0100. WRITE_I2C:F9:03 // Reset Bank 9 ANTIFUSE_EN WRITE_I2C:F9:00 // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //--------------------------------------------------------------------------- // BANK 10 //---------------------------------------------------------------------------...

  • Page 8: Try-Before-Buy Mode Example

    As shown in Table 1, it is possible to start the MMPF0100 directly from the TBBOTP registers without actually programming the part. Shown below is an example of the Try-Before-Buy mode. Note: All code examples in this document represent a script using the KITPFPGMEVME and the associated GUI.
  • Page 9 OTP Overview WRITE_I2C:D4:00 // Vgen4 Voltage = 1.8 V WRITE_I2C:D5:07 // Vgen4 Sequence = 7 WRITE_I2C:D8:0A // Vgen5 Voltage = 2.8 V WRITE_I2C:D9:0C // Vgen5 Sequence = 12 WRITE_I2C:DC:0F // Vgen6 Voltage = 3.3 V WRITE_I2C:DD:08 // Vgen6 Sequence = 8 //[Extended Page 1 Registers: 0xE0 - 0xEF] ---------------------------------- WRITE_I2C:E0:0E // Power-up DVS = 1.5625 mV/us, SeqCLK = 2 ms, PWRON config = 0...

  • Page 10: Otp Registers Description

    OTP Overview OTP Registers Description There are ten banks with a total of 260 fuses, where each bank contains 26 fuses. Each fuse represents one bit of the TBBOTP register map. Table 2 Table 11 show the banks, their fuses and the corresponding bits in the register map.
  • Page 11 OTP Overview Table 5. Bank 4 Fuses Register Name Register bits Description OTP SW3A VOLT SW3A_VOLT[6:0] SW3A power-up voltage 11:7 OTP SW3A SEQ SW3A_SEQ[4:0] SW3A power-up sequence 13:12 OTP SW3A CONFIG SW3A_FREQ[1:0] SW3A power-up frequency 15:14 OTP SW3A CONFIG SW3_CONFIG SW3A/B power-up configuration 18:16 –...
  • Page 12 OTP Overview Table 9. Bank 8 Fuses Register Name Register bits Description OTP VGEN3 VOLT VGEN3_VOLT[3:0] VGEN3 power-up voltage OTP VGEN3 SEQ VGEN3_SEQ[4:0] VGEN3 power-up sequence 12:9 OTP VGEN4 VOLT VGEN4_VOLT[3:0] VGEN4 power-up voltage 17:13 OTP VGEN4 SEQ VGEN4_SEQ[4:0] VGEN4 power-up sequence –...
  • Page 13 OTP Overview Table 11. Bank 10 Fuses Register Name Register bits Description OTP PU CONFIG1 SEQ_CLK_SPEED1[1:0] Power-up sequence delay, bits are XORed OTP PU CONFIG1 SWDVS_CLK1[1:0] Power-up slew rate for all switching regulators, bits are XORed OTP PU CONFIG1 PWRON_CFG1 Power button configuration, bits is XORed OTP FUSE POR1 FUSE_POR1...
  • Page 14 OTP Overview 2.4.1 TBBOTP Registers Description The TBBOTP registers for configuring the switching regulators are listed in Table 12 Table 13 Table 18 provide a general description of the TBBOTP registers for all the switching regulators. Table 12. OTP Switching Regulators Register Summary Register Address Output...
  • Page 15 OTP Overview Table 16. OTP SWx CONFIG Register Description Name Bit # Description SWx_FREQ SWx OTP Frequency configuration 00 = 1.0 MHz 01 = 2.0 MHz 10 = 4.0 MHz 11 = Reserved SWx_CONFIG SWx configuration SW1A/B SW3A 00 = A/B/C Single Phase 00 = A/B Single Phase 01 = A/B Single Phase - C 01 = A/B Single Phase...
  • Page 16 OTP Overview Table 19 shows a summary of all the registers related to the linear regulators, and Table 20 Table 22 provide a general bit description of the linear regulator OTP registers. Table 19. OTP Linear Regulators Register Summary Register Address Output OTP VSNVS VOLT...
  • Page 17 OTP Overview 2.4.2 OTP Redundant Bits Some functions are assigned redundant bits, which are XORed, to allow that function to be changed multiple times. These are the functions that have redundant OTP fuse bits: • Sequence Clock Frequency (Sequence delay) •...
  • Page 18 1 = Prototyping enabled 5. In MMPF0100 FUSE_POR1, FUSE_POR2 and FUSE_POR3 are XOR’ed into the FUSE_POR_XOR bit. The FUSE_POR_XOR has to be 1 for fuses to be loaded. This can be achieved by setting any one or all of the FUSE_PORx bits.
  • Page 19 OTP Overview Table 27. OTP FUSE POR XOR Bits Definition Name Description RSVD Reserved FUSE_POR_XOR Final result of the XOR function of the FUSE_PORx bits RSVD Reserved For example, if FUSE_POR1 is programmed to “1”, then fuse values are loaded as FUSE_POR_XOR is “1”. If FUSE_POR2 is then programmed, FUSE_POR_XOR becomes “0”...
  • Page 20 '1' is written to Bit 7 of the OTP_LOAD_MASK registers, the MMPF0100 is turned off momentarily and then turned back on to reload the fuses. If it is desired to reload the fuses without first turning off the MMPF0100, clear Bit 0 of the PWRCTRL_OTP_CTRL register prior to writing to the OTP_LOAD_MASK register.

  • Page 21: Fuse Programming And Error Correction Code (Ecc)

    OTP Overview 2.4.4 Direct OTP Fuse Read The OTP_FUSE_READ_EN bit allows the reading of the uncorrected fuse values when it is set HIGH. If ECC is not enabled, or there is no programming error, the values loaded into the TBBOTP registers are identical to the fuse values.
  • Page 22 OTP Overview 2.5.2 Error Correction Code (ECC) Error correction is off by default, but it is recommended for all OTP programming operations. When enabled, it reports and corrects a single bit error per fuse bank, but only reports a double bit error per fuse bank. Fuses may be programmed without using ECC.
  • Page 23 OTP Overview Table 35. OTP ECC SE1 and 2 Register Description Name Default Description OTP ECC SE1 ECC1_SE Single error detection in fuse bank 1 0 = No single error detected 1 = Single error detected ECC2_SE Single error detection in fuse bank 2 0 = No single error detected 1 = Single error detected ECC3_SE...
  • Page 24 OTP Overview Table 36. OTP ECC DE1 and 2 Register Description Name Default Description OTP ECC DE1 ECC1_DE Dual error detection in fuse bank 1 0 = No single error detected 1 = Single error detected ECC2_DE Dual error detection in fuse bank 2 0 = No single error detected 1 = Single error detected ECC3_DE...
  • Page 25 OTP Overview 2.5.2.2 Analyzing a Single Bit ECC Error Although not necessary, when a single bit error occurs, the ECC check bits may be read to find out what fuse in a given bank is in error. The check bits for each bank may be read from bits[5:0], in registers 0xE1 to 0xEA, in the Extended Page 2.
  • Page 26 OTP Overview 2.5.2.3 Fuse Programming with ECC To program fuses with ECC, bits in the following registers must be enabled: • OTP EN ECC0 and OTP EN ECC1 in the Extended Page 1 • OTP AUTO ECC0 and OTP AUTO ECC1 in the Extended Page 2. The ECC enable registers are shown in Table 38.
  • Page 27 OTP Overview Table 40. ECC Control Registers in the Extended Page 2 Extended Page 2 C Data bits Addr Name ECC_CTRL1 ECC1_EN_TBB ECC1_CALC_CIN ECC1_CIN_TBB[5:0] ECC_CTRL2 ECC2_EN_TBB ECC2_CALC_CIN ECC2_CIN_TBB[5:0] ECC_CTRL3 ECC3_EN_TBB ECC3_CALC_CIN ECC3_CIN_TBB[5:0] ECC_CTRL4 ECC4_EN_TBB ECC4_CALC_CIN ECC4_CIN_TBB[5:0] ECC_CTRL5 ECC5_EN_TBB ECC5_CALC_CIN ECC5_CIN_TBB[5:0] ECC_CTRL6 ECC6_EN_TBB ECC6_CALC_CIN...

  • Page 28: Hardware Considerations

    4. An input voltage of 3.3 V at the VIN pin Figure 1 shows the minimum requirements for programming the MMPF0100. For programming the MMPF0100 on an application board some hardware considerations have to be made. PROGRAMMING INTERFACE VPGM V3.3...

  • Page 29: Programming The Mmpf0100 On An Application Board

    Programming the MMPF0100 on an Application Board When programming the MMPF0100 in an application board, voltages must be applied at the VIN, VDDIO and VDDOTP pins. Considerations must be made to allow voltages to be applied on these rails in a fully populated system board.

  • Page 30: Programming Using The Pf-Programmer

    The KITPFPGMEVME is Freescale's programming board that can be used to OTP program the MMPF0100. It integrates a 3.3 V LDO to power the MMPF0100 and a boost converter with an adjustable output voltage to generate the OTP programming voltage. An integrated USB-to-I C converter allows PC communication with the MMPF0100 using a Freescale supplied GUI.
  • Page 31 In systems which use different rails for VIN and VDDIO, the requirements for interfacing the KITPFPGMEVME with the MMPF0100 in an application board are different. As the KITPGPGMEVME provides a single rail for VIN and VDDIO, it is necessary to short the two rails on the application board during programming. This requires that the other loads connected on the VDDIO rail in the system be isolated.
  • Page 32 NC7SB3157L6X VDDOTP MMPF0100/Z Figure 5. . Interfacing KITPFPGMEVME for application board MMPF0100 programming (Systems with different VIN and VDDIO) Note: Using the analog switch may not be the most cost effective option to supply VIN and VDDIO. Similar functionality can be achieved by using solder shorts or 0 Ohm resistors. However, minor rework of the board would be required once OTP programming is completed.

  • Page 33: Programming Using A Generic Programmer33

    VDDIO INTB VCOREDIG VCOREREF SYSTEM_VDDIO_SUPPLY VCORE 4.7K 4.7K DIODE ICTEST GNDREF VDDOTP Processor_SCL MMPF0100/Z Processor_SDA NLAS3158 Figure 6. Interfacing a Generic Programmer to the MMPF0100 in an Application Board AN4536 Application Note Rev. 2.0 1/2014 Freescale Semiconductor...

  • Page 34: References

    References References Following are URLs where you can obtain information on Freescale products and application solutions: Document Number and Description MMPF0100 Data Sheet http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0100.pdf MMPF0100ER Errata http://cache.freescale.com/files/analog/doc/errata/MMPF0100ER.pdf PFSERIESFS Fact Sheet http://cache.freescale.com/files/analog/doc/fact_sheet/PFSeriesFS.pdf Freescale.com Support Pages Freescale.com http://www.freescale.com Product Summary Page http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0100 Analog Home Page http://www.freescale.com/analog...

  • Page 35: Revision History

    Revision History Revision History Revision Date Description 5/2013 • Initial release 1/2014 • Updated section 2.2 OTP Programming Example • Added Section 2.3, Try-Before-Buy Mode Example, page 8 • Deleted section 2.4.3 Example Prototyping with ECC • Added AN4536 Application Note Rev. 2.0 1/2014 Freescale Semiconductor...
  • Page 36 How to Reach Us: Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based Home Page: on the information in this document.

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