Pin Description - NXP Semiconductors PCA9555 Product Data Sheet

NXP Semiconductors

5.2 Pin description

Table 3.
Symbol
INT
A1
A2
IO0_0
IO0_1
IO0_2
IO0_3
IO0_4
IO0_5
IO0_6
IO0_7
V
IO1_0
IO1_1
IO1_2
IO1_3
IO1_4
IO1_5
IO1_6
IO1_7
A0
SCL
SDA
V
[1]
PCA9555
Product data sheet
Pin description
Pin
SO24, SSOP24,
TSSOP24
1
2
3
4
5
6
7
8
9
10
11
12
SS
13
14
15
16
17
18
19
20
21
22
23
24
DD
HVQFN and HWQFN package die supply ground is connected to both the V
pad. The V pin must be connected to supply ground for proper device operation. For enhanced thermal,
SS
electrical, and board-level performance, the exposed pad needs to be soldered to the board using a
corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias
need to be incorporated in the PCB in the thermal pad region.
All information provided in this document is subject to legal disclaimers.
Rev. 10 - 8 November 2017
2
16-bit I C-bus and SMBus I/O port with interrupt
Description
HVQFN24,
HWQFN24
22 interrupt output (open-drain)
23 address input 1
24 address input 2
1 port 0 input/output
2
3
4
5
6
7
8
[1]
9 supply ground
10 port 1 input/output
11
12
13
14
15
16
17
18 address input 0
19 serial clock line
20 serial data line
21 supply voltage
PCA9555
pin and the exposed center
SS
© NXP Semiconductors N.V. 2017. All rights reserved.
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