May 2006
Introduction
The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Cross-
over Programmable Logic Device architectures from Lattice. Combining a full 18-bit wide instruction set with
32 General Purpose registers, the LatticeMico8 is a flexible Verilog reference design suitable for a wide variety of
markets, including communications, consumer, computer, medical, industrial, and automotive. The core consumes
minimal device resources, less than 200 Look Up Tables (LUTs) in the smallest configuration, while maintaining a
broad feature set.
Features
• 8-bit Data Path
• 18-bit Wide Instructions
• 32 General Purpose Registers
• 32 bytes of Internal Scratch Pad Memory
• Input/Output is Performed Using "Ports" (Up to 256 Port Numbers)
• Optional 256 bytes of External Scratch Pad RAM
• Two Cycles Per Instruction
• Lattice UART Reference Design Peripheral
Functional Description
The following figure shows a block diagram of LatticeMico8 microcontroller.
Figure 1. LatticeMico8 Microcontroller Block Diagram
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or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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Program Flow Control and PC
Interrupt
rd
rb
From Mem
Program
instr
Memory
17:0
(EBR)
From I/O Port
LatticeMico8 Microcontroller
16 Deep Call Stack
value
op A
Register File
32 8-bit
Registers
op B
Immediate
value
Internal
32-byte Scratch
Pad Memory
Optional External
Scratch Pad
(up to 256 Bytes)
1
User's Guide
Reference Design RD1026
Interrupt Ack
Flags
CY, Z
ALU
ALU Op
To I/O Port
rd1026_01.2
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