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CD-BK2100V
ICV3 VHiSDM4260C-1: DRAM (SDM4260C)
Port Name
Pin No.
1
VCC
Power supply
2-10
I/O0-I/O7
Data input/output
11*,12*
NC
Not used
13
WE
Read/write enable
14
RAS
Row address strobe
15*
NC
Not used
16-19
A0-A3
Address input (row/refresh: A0 to A3) (Column: A0 to A3)
20
VCC
Power supply
21
VSS
Ground
22-26
A4-A8
Address input (row/refresh: A4 to A8) (Column: A4 to A8)
27
OE
Output enable
28,29
UCAS, LCAS
Column address strobe
30*
NC
Not used
31-34
I/O8-I/O11
Data input/output
35
VSS
Ground
36-39
I/O12-I/O15
Data input/output
40
VSS
Ground
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
RAS
14
29
LCAS
28
UCAS
13
WE
A0
16
17
A1
A2
18
19
A3
A4
22
A5
23
A6
24
A7
25
A8
26
All manuals and user guides at all-guides.com
Clock generating
circuit
Coidmn decoder
A0-A8
I/O control circuit
Memory cell array
A0-A8
Figure 58 BLOCK DIAGRAM OF IC
Function
Lower data
Lowar
Input buffer
Upper
Lower data
Output buffer
Upper data
Input buffer
Upper data
Output buffer
– 58 –
1
VCC
20
40
35
VSS
21
2
I/O0
3
I/O1
10
I/O7
31
I/O8
32
I/O9
39
I/O15
27
OE
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