D.6 SMB4: Interrupt queue overflow, run-time program error, interrupts enabled, freeport transmitter idle, and value forced
D.6
SMB4: Interrupt queue overflow, run-time program error, interrupts
enabled, freeport transmitter idle, and value forced
Special memory byte 4 (SM4.0 - SM4.7) contains the interrupt queue overflow bits. These
bits indicate either that interrupts are occurring at a rate greater than the CPU can process or
that the global interrupt disable (DISI) instruction (Page 322) has disabled interrupts.
Other bits indicate:
● Enabled or disabled status of interrupts
● A run-time program error
● Freeport transmitter status
● One or more forced PLC memory values
Table D- 5
SMB4 system status
S7-200 SMART
SM address
symbol name
Comm_Int_Ovr
** SM4.0
Input_Int_Ovr
** SM4.1
Timed_Int_Ovr
** SM4.2
RUN_Err
SM4.3
Int_Enable
SM4.4
Xmit0_Idle
SM4.5
Xmit1_Idle
SM4.6
Force_On
SM4.7
** Use status bits SM4.0, SM4.1, and SM4.2 only inside an interrupt routine. The CPU resets these status bits when the
CPU empties the interrupt queue and returns control to the main program.
D.7
SMB5: I/O error status
Special Memory Byte 5 (SM5.0 - SM5.7) contains a status bit that indicates error conditions
in the I/O system.
Table D- 6
SMB5 I/O error status
S7-200 SMART
SM address
symbol name
IO_Err
SM5.0
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
Description
TRUE: Communication interrupt queue has overflowed.
TRUE: Input interrupt queue has overflowed.
TRUE: Timed interrupt queue has overflowed.
TRUE: CPU has detected a run-time programming non-fatal error.
TRUE: Enabled interrupts exists
TRUE: Port 0 transmitter is idle (FALSE: Transmission in progress).
TRUE: Port 1 transmitter is idle (FALSE: Transmission in progress).
TRUE: Existence of forced PLC memory
Description
This bit is set ON if any I/O errors are present.
Special memory (SM) and system symbol names
805
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