System Control Register 0 (Syscr0) - Renesas R5F56307CDFN User Manual

32-bit mcu rx family / rx600 series rx630 group
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RX630 Group
3.2.3

System Control Register 0 (SYSCR0)

Address(es): 0008 0006h
b15
b14
0
0
Value after reset:
Bit
Symbol
Bit Name
b0
ROME
On-Chip ROM Enable
b1
EXBE
External Bus Enable
b7 to b2
Reserved
b15 to b8
KEY[7:0]
SYSCR0 Key Code
Note 1. Write data is not retained.
ROME Bit (On-Chip ROM Enable)
The ROME bit enables or disables the on-chip ROM (ROM, E2 DataFlash).
Once cleared to 0, it cannot be reverted to 1.
A 0 should not be written to this bit while a program is being executed from the on-chip ROM. After writing a 0 to this
bit, be sure to disable the on-chip ROM by changing the ROME bit to 0 before proceeding with further processing.
EXBE Bit (External Bus Enable)
The EXBE bit enables or disables the external bus.
Do not write 0 to this bit while a program is running from an external address space. Write 0 to this bit after access to the
external bus is completed. Furthermore, when an external address space is included in the range of transfer by the
DMAC, prohibit DMA transfer before writing 0 to this bit.
After writing to the EXBE bit, confirm that its value has actually changed before proceeding with further processing.
When the EXBE bit is set to 1, the related I/O port settings must also be changed as required. For details, see section 21,
Multi-Function Pin Controller (MPC) .
R01UH0040EJ0150 Rev.1.50
Sep 28, 2012
b13
b12
b11
b10
KEY[7:0]
0
0
0
0
Description
0: The on-chip ROM is disabled.
1: The on-chip ROM is enabled.
0: The external bus is disabled.
1: The external bus is enabled.
These bits are read as 0. The write value should be 0.
These bits control permission and prohibition of writing to the
SYSCR0 register. To modify the SYSCR0 register, write 5Ah to the
eight higher-order bits and the desired value to the eight lower-order
bits as a 16-bit unit.
b9
b8
b7
b6
0
0
0
0
3. Operating Modes
b5
b4
b3
b2
EXBE ROME
0
0
0
0
Page 125 of 1654
b1
b0
0
1
R/W
R/W
R/W
R/W
1
R/(W)*

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