0X4220/0X4240/0X4260: 16-Bit Timer Ch.x Input Clock Select Registers (T16_Clkx) - Epson S1C17704 Technical Manual

11 16-BIT TIMERS (T16)

0x4220/0x4240/0x4260: 16-bit Timer Ch.x Input Clock Select Registers (T16_CLKx)

Register name Address Bit
16-bit Timer 0x4220 D15–4 –
Ch.x Input 0x4240
D3–0 DF[3:0]
Clock Select 0x4260
Register (16 bits)
(T16_CLKx)
Note: The letter 'x' in register names, etc., denotes a channel number from 0 to 2.
0x4220: 16-bit Timer Ch.0 Input Clock Select Register (T16_CLK0)
0x4240: 16-bit Timer Ch.1 Input Clock Select Register (T16_CLK1)
0x4260: 16-bit Timer Ch.2 Input Clock Select Register (T16_CLK2)
D[15:4] Reserved
D[3:0] DF[3:0]: Timer Input Clock Select Bits
These bits select the count clock of the 16-bit timer from 15 prescaler output clocks.
DF[3:0]
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
Note: When setting the count clock, make sure the 16-bit timer counter is stopped.
11-12
Name Function
reserved
Timer input clock select
(Prescaler output clock)
Table 11.9.2 Selecting the Count Clock
Prescaler output clock
Reserved
PCLK•1/16384
PCLK•1/8192
PCLK•1/4096
PCLK•1/2048
PCLK•1/1024
PCLK•1/512
PCLK•1/256
EPSON
Setting Init. R/W
– –
DF[3:0] Clock 0x0 R/W
0xf reserved
0xe PCLK•1/16384
0xd PCLK•1/8192
0xc PCLK•1/4096
0xb PCLK•1/2048
0xa PCLK•1/1024
0x9 PCLK•1/512
0x8 PCLK•1/256
0x7 PCLK•1/128
0x6 PCLK•1/64
0x5 PCLK•1/32
0x4 PCLK•1/16
0x3 PCLK•1/8
0x2 PCLK•1/4
0x1 PCLK•1/2
0x0 PCLK•1/1
DF[3:0] Prescaler output clock
0x7 PCLK•1/128
0x6 PCLK•1/64
0x5 PCLK•1/32
0x4 PCLK•1/16
0x3 PCLK•1/8
0x2 PCLK•1/4
0x1 PCLK•1/2
0x0 PCLK•1/1
S1C17704 TECHNICAL MANUAL
Remarks
– 0 when being read.
(Default: 0x0)