Dvd player/hi-fi video cassette recorder (60 pages)
Summary of Contents for Sansui Micro-750-D
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MODEL SERVICE MANUAL CRO 750D CAUTION : Before servicing this chassis, read the "PRODUCT SAFETY SERVICE FOR VIDEO PRODUCTS" section on page 3 of this manual. CONTENTS SERVICE PRECAUTIONS ......2-3 DVD and CD BLOCK DIAGRAMS .
PRODUCT SAFETY SERVICING GUIDELINES FOR VIDEO PRODUCTS CAUTION: DO NOT ATTEMPT TO MODIFY THIS PRODUCT IN ANY WAY AND SUBJECT: X-RADIATION N E V E R P E R F O R M C U S T O M I Z E D I N S TA L L AT I O N S W I T H O U T 1.
SERVICING PRECAUTIONS CAUTION : Before servicing the DVD covered by this Electrostatically Sensitive (ES) Devices service data and its supplements and ADDENDUMS, read Some semiconductor (solid state) devices can be damaged SAFETY PRECAUTIONS NOTE and follow the : if easily by static electricity. Such components commonly are unforeseen circumstances create conflict between the called Electrostatically Sensitive (ES) Devices.
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FM+AM TFCE1E XP10 A750 AMP ASS'Y XP404 XP13 XP402 A750 KEY ASS'Y AD750 PO WER ASS'Y XP403 A750 MIC ASS'Y DSM750 DECODER ASS'Y KHL-232B LOADING ASS'Y...
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IC INTRODUCTION D1890 PIN ASSIGNMENTS Pin Numbers PIN NAME Type Description QFP100 and LQFP100 RF Flag Interface DEFECT Digital Output Flag of bad data output status RF SIO interface SLCK Digital Input RF serial clock input SDEN Digital Input RF serial data enable SDATA Digital IO RF serial data IO...
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Pin Numbers PIN NAME Type Description FLVLNI Analog input RF level amplifier negative input CDCSNI Analog input CD central servo signal negative input CDCSPI Analog input CD central servo signal positive input DVDCSNI Analog input DVD central servo signal negative input DVDCSPI Analog input DVD central servo signal positive input...
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D1870 PIN ASSIGNMENTS Pin Numbers Pin NAME Type Description RG data PLL interface PLLVDD Power Power for data PLL and related analog circuitry. JITFN Analog Input The negative input terminal of operation amplifier for RF jitter meter. JITFO Analog Output The output terminal of RF jitter meter.
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Pin Numbers Pin NAME Type Description TTL Output LED control output. TTL Input PLY#/PAU# Play/pause key input, active low. 50K pull up TTL Input EJ/STOP# Eject, stop key input, active low. 50K pull up TTL Input LIMIT# Sledge inner limit input, active low. 50K pull up TTL Input Tray_is_out input.
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Pin Numbers Pin NAME Type Description RAM write enable, low active. When two write enable pins are used, it only RW E# TTL Output for low byte. High column address strobe: Write enable High Byte Multi-function pin: low active CASH#/RWE TTL Output RAM column address strobe for high byte, when two column address strobe pins are used.
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Pin Numbers Pin NAME Type Description Device I/O write: Stop Ultra DMA burst This is multi-function pin. For Device I/O Write, this signal is the strobe signal asserted by the host to Schmitt DIOW# write device registers or the data port. Input 50K pull up For Stop Ultra DMA, this signal shall be negated by host before data is transferred in an Ultra DMA burst and is asserted by host during an Ultra...
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D1870 BLOCK DIAGRAM TEST RFRPSLV RFZC/ TEZI RF flag Data Data TEZC TEZISLV Slicer Interface CDROM Varipitch System DRAM Circuit HRFZC Reset CIRC/RSPC PRST# Sync Detection Clock Clock Logic Error Corrector Decoder Descrambler Generator Generator ADCVDD Servo Sync RFRP System Clock RFLEVEL Protection RD[15:0]...
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VS3811 PIN ASSIGNMENTS Name Number Definition 1,9,18,27,35,44,51,59,68,75,83,92,99 3.6 V power supply. , 104, 111,121,130,139,148,157,164, 172, 183, 193,201 LA[21:0] 23:19,16:10,7:2,207:204 Device address output. 8,17,26,34,43,52,60,67,76,84,91,98,1 Ground. 03,112,120,129,138,147,156163,171, 177,184,192,200,208 RESET# Reset input, active low. TDM transmit data. ROM Select TDMDX RSEL Selection RSEL 16-bit ROM 8-bit ROM TDMDR...
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Name Number Definition DB[15:0] 96:93,90:85,82:77 DRAM data bus. DCS[1:0]# 97,100 SDRAM chip select [1:0], active low Data input/output mask. DSCK Clock to SDRAM. DCLK Clock Input (27 MHz) YUV[7:0] 115:113,110:106 8-bit YUV output. PCLK2XSC 2X pixel clock. PCLKQSCN Pixel clock. Vertical synch screen...
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CS4955 PIN ASSIGNMENTS PIN NAME NUMBER TYPE DEFINITION V[7:0] 8,7,6,5,4,3,2,1 Digital video data inputs 27MHz input clock PADR Address enable line XTAL-IN Sub-carrier crystal input XTAL-OUT Sub-carrier crystal output HSYNC/CB Active low horizontal sync, or composite blank signal VSYNC Active low vertical sync FIELD/CB Video field ID.
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PCM1723 PIN ASSIGNMENTS PIN NAME NUMBER TYPE DEFINITION Master clock input System Clock Out. This output is 256fs or 384fs.System clock generated SCKO by the internal PLL. PLL Power Supply (+5v) No connection MCKO Buffered clock output of crystal oscillator Latch for serial control data Clock for serial control data Data for serial control...
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BA6208 EQUIVALENT CIRCUIT DIAGRAM V C C G N D 6 ( 1 ) 5 ( 3 , 7 ) R 2 6 R 1 1 Q 1 0 Q 1 4 Q 1 7 Q 1 1 Q 1 2 R 1 4 R 1 3 Q 1 6...
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