Table of Contents
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Ordering Information
PART NUMBERS
8MHz
CP82C54
CP82C54-10
IP82C54
IP82C54-10
CS82C54
CS82C54-10
IS82C54
IS82C54-10
CD82C54
CD82C54-10
ID82C54
ID82C54-10
MD82C54/B
MD82C54-10/B
MR82C54/B
MR82C54-10/B
SMD # 8406501JA
SMD# 84065013A
CM82C54
CM82C54-10
Functional Diagram
DATA/
BUS
D
- D
8
7
0
BUFFER
RD
READ/
WR
WRITE
LOGIC
A
0
A
1
CS
CONTROL
WORD
REGISTER
Pin Description
DIP PIN
SYMBOL
NUMBER
D7 - D0
1 - 8
CLK 0
9
OUT 0
10
GATE 0
11
GND
12
OUT 1
13
GATE 1
14
CLK 1
15
GATE 2
16
OUT 2
17
10MHz
12MHz
CP82C54-12
IP82C54-12
CS82C54-12
IS82C54-12
CD82C54-12
ID82C54-12
MD82C54-12/B
MR82C54-12/B
-
8406502JA
-
84065023A
CM82C54-12
CLK 0
COUNTER
GATE 0
0
OUT 0
CLK 1
COUNTER
GATE 1
1
OUT 1
CLK 2
COUNTER
GATE 2
2
OUT 2
TYPE
I/O
DATA: Bi-directional three-state data bus lines, connected to system data bus.
I
CLOCK 0: Clock input of Counter 0.
O
OUT 0: Output of Counter 0.
I
GATE 0: Gate input of Counter 0.
GROUND: Power supply connection.
O
OUT 1: Output of Counter 1.
I
GATE 1: Gate input of Counter 1.
I
CLOCK 1: Clock input of Counter 1.
I
GATE 2: Gate input of Counter 2.
O
OUT 2: Output of Counter 2.
82C54
TEMPERATURE
RANGE
o
o
0
C to +70
C
o
o
-40
C to +85
C
o
o
0
C to +70
C
o
o
-40
C to +85
C
o
o
0
C to +70
C
o
o
-40
C to +85
C
o
o
-55
C to +125
C
o
o
-55
C to +125
C
o
o
-55
C to +125
C
o
o
-55
C to +125
C
o
o
0
C to +70
C
CONTROL
STATUS
LATCH
WORD
REGISTER
STATUS
REGISTER
CONTROL
LOGIC
GATE n
CLK n
OUT n
COUNTER INTERNAL BLOCK DIAGRAM
DEFINITION
4-216
PACKAGE
PKG. NO.
24 Lead PDIP
E24.6
24 Lead PDIP
E24.6
28 Lead PLCC
N28.45
28 Lead PLCC
N28.45
24 Lead CERDIP
F24.6
24 Lead CERDIP
F24.6
24 Lead CERDIP
F24.6
28 Lead CLCC
J28.A
24 Lead CERDIP
F24.6
28 Lead CLCC
J28.A
24 Lead SOIC
M24.3
INTERNAL BUS
CR
CR
M
L
CE
OL
OL
M
L
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