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A
B
8
FROM/TO
MPEG
7
MA4 {1}
MA3 {1}
MA5 {1}
MA2 {1}
MA6 {1}
MA1 {1}
MA7 {1}
MD15
MA0 {1}
MA8 {1}
MA10 {1}
MA9 {1}
MD14
MA11 {1}
MCS0# {1}
MRAS# {1}
MPCLK {1}
MD13
MCAS# {1}
MWE# {1}
6
MDQM {1}
MD12
MD8 {1}
MD7 {1}
MD9 {1}
MD6 {1}
MD10 {1}
MD5 {1}
MD11
MD11 {1}
MD4 {1}
MD12 {1}
MD10
MD3 {1}
MD13 {1}
MD2 {1}
MD14 {1}
MD1 {1}
MD15 {1}
MD9
MD0 {1}
5
MD8
C4018
0.1 F
MDQM
7
MPCLK
4
MA9
MA8
MA7
MA6
MA5
3
MA4
2
1
A
B
C
SDRAM SCHEMATIC DIAGRAM
S-DRAM
IC4002
HY57V161610DTC-8
0
3.2
VSS
VCC
0
0.5
MD0
I/O15
I/O0
0.9
0.5
MD1
I/O14
I/O1
0
0
VSSQ
VSSQ
1.2
1.0
MD2
I/O13
I/O2
1.2
0.8
MD3
I/O12
I/O3
3.2
3.2
VCCQ
VCCQ
0.9
0.8
MD4
I/O11
I/O4
0.9
0.8
MD5
I/O10
I/O5
0
0
VSSQ
VSSQ
0.9
0.4
MD6
I/O9
I/O6
0.9
0.7
MD7
I/O8
I/O7
3.2
3.2
VCCQ
VCCQ
0
0
MDQM
NC
NC
DQML
3.3
0
3.1
MWE#
DQMU
WE
1.5
3.1
MCAS#
CLK
CAS
3.2
3.0
MRAS#
CKE
RAS
0.1
2.9
MCS0#
NC
NC
CS
0.3
0.6
MA11
A9
A11
0.2
2.2
MA10
A8
A10
0.6
0.6
MA0
A7
A0
0.6
0.5
MA1
A6
A1
0.6
0.5
MA2
A5
A2
0.9
0.5
MA3
A4
A3
0
3.2
VSS
VCC
C4019
0.1
F
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
C
D
E
(SYSCON PCB)
NOTE:
THE DC VOLTAGE AT EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK
D
E
F
G
FROM VIDEO ENCORDER
B4002
AT+D3.3V {1,4}
N2012ZP600T25
DGND {1,3,4}
PCB010
VMX212
DET.CHKD BY
DESCRIPTION
K.MURATA
PAL/NTSC
CHKD BY
STANDARD
W.PHON
IRAM
DESIGN BY
MODEL
T.SARAWUT
M2A1
M2A1-11A
DV-C4
DRAWN BY
S.PRATUAN
F
G
H
8
7
6
5
4
3
2
PCB NAME
FUNCTION
SDRAM
VMX212A_D
1
Rev.No:
3.0
DWG.NO.
3
M2A1
MPJ2
10
ISSU
:
A
ORION ELECTRIC CO.LTD
SECTION:
TEC-HQ
DATE:
DISTRIBUTE:
PUBRICATION:
TEC-HQ SEC.
T1
H
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