Pioneer PX-7 Service Manual page 73

13.
CIRCUIT
DESCRIPTION
13.
1
BLOCK DIAGRAM
DESCRIPTION
•
TOTAL, CPU
1.
CPU
(Central Processing Unit)
•
LH0080A
(Z80A
equivalent)
(3.58MHz
clock
frequency)
•
1
WAIT
generated during
instruction fetch
(Ml)
cycle
• Mode
0, 1,
and 2
interrupt processing
from
INT
pin possible (without
using
NMI)
Interrupts include
1)
Interrupt for each
single
feed scan from
VDP
(50Hz
cycle)
2)
Interrupt
when
external
video
signal
is
switch-
ed
off
in
superimpose or
video
mode
3)
Interrupt
from
external device via cartridge
slot
2.
ROM
(Read
Only Memory)
• 32K
bytes
masking
ROM
(YM-2301-23908
used
as
built-in
MSX-BASIC
interpreter
(UK
version)
•
8K
bytes
masking
ROM
(PD5031)
used
as
built-in
extension
P-BASIC
interpreter
ROM.
Substitute
EP-ROM
(M5L2764K-213)
a Total
ROM
area of
40K
bytes
3.
RAM
(Random
Access
Memory)
•
32K
bytes
RAM
• Four 16K
X
4-bit
D-RAMs
(MB81416-12
or
M5M4416P-15)
used
as
RAM
4.
VDP,
V RAM,
and
RF
MOD
• TMS9129NL
(PAL
system
color difference
signal
output).
16K
bytes
V-RAM
•
Two
16K
X
4-bit
D-RAMs
(TMS4416-15NL
or
M5M4416p-15)
used
as
V-RAM
• 256
X
192 dots 16
color display (including
transparent, black,
and
white).
32
sprites
(dynam-
ic
picture) pattern generation
possible
5.
Video
Circuit
and
Interface
•
RGB
(TTL
level digital
output)
and
PAL
com-
posite
output and
RF
output
are
generated
from
VDP
color difference output,
and
combination
with
external
composite
input
signal (three
modes:
superimpose, video,
and computer)
6.
PPI
(Programmable
Peripheral Interface)
•
M5L8255AP-5
with three
built-in 8-bit
I/O
ports
(PAO
thru
PA7,
PBO
thru PB7,
PCO
thru
PC7)
•
Mode A
used with
PAO
thru
PA7
set
as output,
PBO
thru
PB7
set
to
input,
and
PCO
thru
PC7
set
to
output
•
PAO
thru
PA7
allocated to
slot selection,
PBO
thru
PB7,
PCO
thru
PC3
and
PC6
to
keyboard
I/F,
PB4
and
PB5
to data recorder
I/F,
and
PC7
to
sound output
7.
Keyboard
Interface
• Output
of scan
signals
to
keyboard key
matrix,
and input of
key
input
(return) signal
•
Number
of
connector
cable
lines
reduced
by
transferring scan
output and key
input signals
via bidirectional
bus
8.
PSG
(Programmable Sound Generator)
• YM-2149
with
three
sound output
channels A,
B,
and
C
(8
octave
and
1
noise output) and
two
8-bit
I/O ports
(IOAO
thru
IOA7
and IOBO
thru
IOB7)
•
IOAO
thru
IOA7
used
as
input ports
and
IOBO
thru
IOB7
used
as
output ports
• IOAO
thru
IOA5
and
IOBO
thru
IOB6
are
used
as
control
1
and
2
I/Fs,
and
IOA7
is
used
as
data
recorder data input
•
Other
ports are
not used
9.
Audio
Data Interface
• Data
recorder data input/output and motor
control
10.
CPE
Disk Interface
•
Conversion of
right
channel audio
data
signal
from
CPE
(Computer Program Encoded)
disc to
TTL
levels
11.
Muting
Control,
Sound
Mixer,
and
Interface
•
Allocation
and mixing of
PSG
outputs
A
(cen-
ter),
B
(left channel),
C
(right
channel),
PPI
SOUND
output
(center),
and
cartridge
slot
SUNDIN
input
(center),
and removal
of unwant-
ed
harmonic components by LPF.
External audio inputs (with independent
left
and
right
muting on/off switching
by muting
control) plus
mixed
audio
and
speaker outputs
are
also
obtained.
12.
System
Control
Interface
e PIONEER'S
standard
remote
control devices
and LD-1100 remote
control
interface
73