CHAPTER 4
Addressing Modes
The Z-80 has a wide repertoire of instructions, ranging from a
simple instruction to set the interrupt enable flip-flop to a block-
search instruction that searches a string of bytes for a given byte.
Because of the wide range of functions that Z-80 instructions per-
form, instructions range in length from one byte to four bytes. In
addition to differences in length, instructions differ in how external
memory is addressed. Some instructions require no operand and can
be executed during the last portion of an Ml (fetch) cycle. Other
instructions require an operand from a CPU register and a second
operand either from another CPU register or external memory. The
second operand may be specified in a variety of ways. As an exam-
ple, the ADD instruction adds two 8-bit operands. One of the op-
erands is in the A register, while the second can be in another CPU
register (Register Addressing), an immediate value in the ADD
instruction itself (Immediate Addressing), in memory and pointed
to by the contents of the HL register pair (Register Indirect Ad-
dressing), or in a memory location whose address is computed by
adding a 16-bit displacement in the instruction and the contents of
an index register (Indexed Addressing). This chapter will describe
the various addressing modes of the Z-80, using examples of specific
instructions. The next chapter discusses instruction types and de-
scribes which addressing modes are valid for each instruction.
The Z-80 has the following addressing modes, generally ordered
from simple to complex:
1. Implied Addressing
2. Immediate Addressing
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