Motorola 68HC12 User Manual page 14

Output Compare 7
Output Compare 7 has a special feature that makes it very powerful.
Output Compare 7 allows the programmer to change the state of any of the output
compare pin, without changing the operation that is performed by that Output
Compare. This is particularly useful for generating pulsewidth modulated signals.
Anyone interested in this particular application should refer to the LITEC manual
for more detailed information on pulsewidth modulation.
The method for using output compare 7 to control the other output compares is set
up as follows. Just as with any other output compare operation, the time at which
OC7 is triggered must be stored in _H12TOC7. The next step is to select which
channels will be controlled by OC7 and what will occur when OC7 triggers.
done using the _H12OC7M and _H12OC7D registers.
_H12OC7M is used to select which channels are controlled by OC7.
a bit in _H12OC7M assigns control of the corresponding channel to OC7. The data
that is output by the channel is stored in _H12OC7D.
each bit that is set in _H12OC7M, the corresponding data bit in _H12OC7D is written
to the output compare pin.
A successful OC7 event can be used to cause the "free running" counter to be reset.
This is done by writing a one to TCRE in _H12TMSK2.
set the OC7 event for $0000 the free running counter will stay at $0000.
if you set OC7 for $FFFF, the Timer Overflow Flag will never be set.
Overflow Interrupt.)
_H12OC7M:
bit 7 bit 6
OC7M7 OC7M6
_H120C7D:
bit 7 bit 6
OC7D7 OC7D6
_H12TMSK2:
bit 7 bit 6
TOIE unused
Sample Code
This code simply shows how to setup OC7.
_H12TC7=0x4000;
_H12OC7M=0x01;
_H12OC7D=0x00;
bit 5 bit 4
OC7M5 OC7M4
bit 5 bit 4
OC7D5 OC7D4
bit 5 bit 4
TPE TDRB
// Set up the time when the OC triggers
// select channel 0
// cause channel 0 to output a low when
// triggered
Note if you write a one and
bit 3 bit 2
OC7M3 OC7M2
bit 3 bit 2
OC7D3 OC7D2
bit 3 bit 2
TCRE PR2
14
Writing a one to
When OC7 is triggered, for
(See Timer
bit 1 bit 0
OC7M1 OC7M0
bit 1 bit 0
OC7D1 OC7D0
bit 1 bit 0
PR1 PR0
This is
Similarly