Infineon Technologies TC1796 User Manual page 1861

32-bit single-chip microcontroller
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24.3.12
Service Request Registers
The bits in the Service Request State Registers are service request status flags that are
set by hardware (type "h") when the related event occurs. Each service request status
flag can be read twice (in SRSCx register and in SRSSx register, x = 0-3) and cleared or
set by software when writing to the specific request bit in SRSCx or SRSSx.
The service request status flags can be cleared by software when writing a 1 to the
corresponding bit location in the SRSCx registers. Writing a 0 has no effect.
The service request status flags can be set by software when writing a 1 to the
corresponding bit location in the SRSSx registers. Writing a 0 has no effect.
GPTA0_SRSC0
GPTA0 Service Request State Clear Register 0
GPTA1_SRSC0
GPTA1 Service Request State Clear Register 0
31
30
29
28
15
14
13
12
GT
GT
0
PLL
01
00
r
rwh
rwh
rwh
Field
Bits
DCM00R,
0,
DCM01R,
3,
DCM02R,
6,
DCM03R
9
DCM00F,
1,
DCM01F,
4,
DCM02F,
7,
DCM03F
10
User's Manual
GPTA, V2.0
(010
(010
27
26
25
24
11
10
9
8
DCM
DCM
DCM
DCM
03C
03F
03R
02C
rwh
rwh
rwh
rwh
Type Description
1)
rwh
DCMk
0
No service is requested.
B
1
Service is requested due to a rising edge
B
detected on the DCMk input signal line.
1)
rwh
DCMk
0
No service is requested.
B
1
Service is requested due to a falling edge
B
detected on the DCMk input signal line.
24-206
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
)
H
)
H
23
22
21
0
r
7
6
5
DCM
DCM
DCM
02F
02R
01C
rwh
rwh
rwh
Rising Edge Event Service Request State
Falling Edge Event Service Request State
TC1796
Reset Value: 0000 0000
Reset Value: 0000 0000
20
19
18
17
4
3
2
1
DCM
DCM
DCM
DCM
01F
01R
00C
00F
rwh
rwh
rwh
rwh
V2.0, 2007-07
H
H
16
0
DCM
00R
rwh

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