Sharp CD-PC1881V Service Manual page 47

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IC2 VHiLC78631E-1: Servo/Signal Control (LC78631E) (2/2)
Pin
Terminal Name Input/Output
No.
51
XVSS
52
XOUT
53
XIN
54
XVDD
55
RVSS
56
RCHN
57
RCHP
58*
RVDD
59*
MUTER
60*
SBSY
61*
EFLG
62*
PW
63*
SFSY
64
SBCK
65*
DOUT
66*
FSX
67
WRQ
68
RWC
69
SQOUT
70
COIN
71
CQCK
72
RES
73*
FAST
74*
CONT2
75
16M
76
4.2M
77
TEST5
78
CS
79
DEFI
80
VCOC
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Note: The same potential must be to the power terminals (VDD, VVDD, LVDD, RVDD, XVDD).
Unused input ports of general-purpose input/output ports (I/O) must be connected to 0V or set output port.
V/P
15
CLV+,
13
CLV
14
CLV-
FRAME
22
SYNCHRONOUB
FSEQ
PROTECTION
21
PCK
EFMO
9
PLL
EFMI
11
DEFI
79
2,
PD02,
PD01
3
FR,
5,
7
ISET
FAST
73
VARIABLE
VPDO
1
PITCHRO
VCOC
80
PKK
53 19,20 28,29 30,31 23,24,25 78,68
52
Crystal osccillator garound. Normaly 0v.
Output
16.9344 MHz crystal oscillator connections. Use a 33.8688 MHz Crystal oscillator for quadspeed playback.
Input
16.9344 MHz crystal oscillator connections. Use a 33.8688 MHz Crystal oscillator for quadspeed playback.
Crystal oscillator power supply.
Output
One-bit D/A
Output
converter pins
Output
Output
Subcode block synchronization signal output.
Output
C1 and C2 error correction state monitor.
Output
Subcode P,Q,R,S,T,U and W output.
Output
Subcode frame synchronization signal output. Falls when the subcode output goes to the standby state.
Input
Subcode readout clock input. This is a Schmitt input.
Output
Digital output.
Output
Outputs a 7.35 kHz synchronization signal generated by dividing the crystal oscillator frequency.
Output
Subcode Q outputstandby output.
Input
Read/write control input.
Output
Subcode Q output.
Input
Input for commands from the control microprocessor.
Input
Command input acousition clock. Also used as the SQOUT subcode readout clock input.
This is a Schmitt input.
Input
Chip reset input. This pin must be set low temporary when power is first applled.
Output
Not used
Output
Output port.
Output
16.9344 MHz output. 33.8688 MHz output in 4x playback mode.
Output
4.2336 MHz output.
Input
Test input. A pull-down resistor built in.
Input
Chip select input. A pull-down resistor is built in.
Input
Defect detection signal input.
Input
Variable pitch VCO control input.
FAST
DETECT
TJ
COMMAND
I/F
70,71
Figure 47 BLOCK DIAGRAM OF IC
Function
Right channel ground. Normaly 0V.
Right channel N output.
Right channel P output.
Right channel power supply.
Right channel mute output.
ADDRESS
GENERATOR
DRAM
CIRC
EFM
(ECC)
DEMODULATION
SUB CODE
ANTI-SHOCK I/F
DEMODULATION
DOUT
64 60,62,63,67,69
65 32
– 47 –
DATA
COMPENSATION
MUTE
PQRT
D-ATT
DE EMPHASIS
DAC
DF
34,35,36
CD-PC1881V
66,
FSX,
61
EFLG
42,
LRSY,
43,
CK2,
44,
ROMXA,
45
C2F
33,
P5,
PO/DFCK
38
59
MUTER
RCHP,
56,
RCHN
57
LCHP,
48,
49
LCHN
MUTEL
46

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