Mitsubishi Electric AJ71QC24 Manual page 81

Melsec qna serial communications module
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5. NON PROCEDURE PROTOCOL COMMUNICATION
MELSEC QnA
5.4.2
PC CPU inDut/outDut signals
The following shows the inputloutput signals used with the non procedure protocol.
Input signals (AJ71 QC24+PC CPU)
Input Signal
Contents
Signal Name
XnO
was beina sent.
Turned ON when an error was detected while data
Send error detected
Xn 1
a Request to Send signal from the PC CPU.
Turned ON at the end
o f
transmission in response to
Send normal end
Xn3
ceivina data.
Turned ON when an error was detected while re-
Receive error detected
Xn4
Turned ON when the QC24 receives data from an
Receive data read request
external device after the QC24 was started.
Xn+l E
I
QC24 Ready signal
ITurned ON when the QC24 becomes operative.
I
Output signals (PC CPU+QC24)
Output Signal Contents
Signal Name
YnO
QC24 from the PC CPU is sent to the external de-
Turned ON when the buffer memory data sent to the
Request to Send
vice after the QC24 is started.
Ynl
End of Receive Data Read Turned ON when the PC CPU finishes reading the
data received at the QC24 from the external device.
(Note) XnO and YnO are input and output signals determined by the slot into which the QC24 was
inserted.
With the system configuration shown below, the QC24 is allocated to X.Y80-9F.
o
I
2
3
4
(Slot No.)
XnG=XBG
Xn2=X82
YnG=Y80
Ynl=Y81
X00
Y40
X Y80
X3F
Y7F
X Y9F

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