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Sony SEQ-555ES Service Manual page 10

Program equalizer

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SEQ-555ES
to equalizer circuit
Sg switch
LINE IN
AUX,
AUX,
from equalizer
circuit
TAPE2
TAPE]
to LINE
OUT
REC OUT2
REC OUT1
F, and F3 are interlocked.
EQUALIZER
CIRCUIT
ICios
Ry20 13k
Crip 220P
controlled by
microcomputer
Cros
CX-7976
resonance
circuit
63H2
resonance
circuit
31.5Hz
The
equalizer
circuit is structured
as shown in the
above diagram, and actually, four IC's are connected
parallel
to ICj93
and
determine
the frequencies.
These IC's are controlled by microcomputer.
In the example
above, many
switches and resistors
are
connected
inside
ICj9g, and
because
it is con-
nected
to the resonance
circuits via these resistors,
and the NF circuit is connected
to these resonance
circuits
when
it is on the UP
side, the frequency
component output gain becomes high. When DOWN,
these resonance
circuits connect to the attenuation
circuit,
so
the
frequency
component
gain drops.
ICiog is controlled by microcomputer, and depending
on
the
data
sent
from
the
microcomputer,
can
control only Q; or Qz, or both.
The equalizer frequency is controlled by these combi-
nations.
+6dB
or +12dB
switching
is done
by ICj97. When
ICjo7
internal
switch is off, it is +12dB,
and +6dB
when on.
CX-7976
Features:
This is a 2 channel independent variable
2dB
step electronic volume
for low dis-
tortion equalizer, containing two circuits
which
can
obtain
+12dB
attentuation.
Control is done by 11 bit serial data from
a microcomputer, etc.
Functions:
Qi.
(@, @, &, @ ) These pins are connected to L
and
R_
channel
resonance
circuits.
UP
(@, @ )
Connected
to op amp invert-
ed input.
DOWN
(@, @)
Connected
to op amp non-
inverted input.
Serial data bits 9, 10 and 11
are
all selected
at the same
time
as
pins
CS,,2,3
level.
"<Q" = Vss
"1"? = OPEN or Voi
CSi,2,3 (©, ©, @)
VDL
(@)
Power supply (5V higher than
Vss).
Vss
(@)
Power supply (-14V).
CLOCK
( @)
Clock signal input pin.
Data
(dad)
Serial data input pin.
Strobe
(@)
Latches
data taken
into the
IC at signal rise.
Lyref
(4)
Sets
control
signal
(clock,
data, strobe) input level.
Vpp
(@)
Power supply (+14V).
The 11 bit serial control data is input to the IC from
the MSB (most significant bit).
Data is taken into the IC shift register at clock signal
rise.
After data is taken
in, the clock signal is stopped,
and the strobe signal rises. The strobe signal transmits
the data to the latch, and the data contents determine
which switch is turned on or off.

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