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ROM
consists of three 8192
X
8-bit and
two
16,384
X
8-bit
read-only memory devices.
The program
mem-
ory fo
r
the
IEEE
option
(Option
B) and the cellular
mobile
te lephone
option (Option
A) is
contained
on
pages
1 and
3.
Option
B
uses
a single 8192
X
8-bit
ROM
device,
while
Option A
uses two 16,384
X
8-bit
ROM
devices.
14.2.2.3
Random-Access Memory (RAM)
The
random-access
memory
provides
temporary
data storage
for
the
processor and for
the CRT alpha-
numeric display.
The
RAM for
the
main program
and
all
options
is
located on
page 2 of memory.
The
main
program's
RAM
can
store
1024 eight-
bit
words,
of
which
512 are used
for the CRT display
data.
Option
A
has provisions
for
a 1024
X
8-bit RAM
device.
14.2.2.4
Nonvolatile Memory (NVM)
The
nonvolatile
memory
provides
storage
for 1024
8-bit
words.
Data
that
is
to be
held
during power-off is
held
in
the
NVM,
which consists
of a
battery-backed
RAM
.
When the
power
is
turned on, the
microproces-
sor
reads
the
NVM
contents to
obtain
its
start-up
mode,
the
RF
and
tone-memory
presets,
and the
remainder
of the
preset data.
If
the operator
changes
a preset,
the
microprocessor changes the
data
in
the
NVM
to remember the
new
preset.
14.2.3 INPUT/OUTPUT
Peripheral-interface adapters provide
input
and
output
latches
for
external data
to and
from
the pro-
cessor.
The
PIA
on this board (U22)
provides
for
nine
inputs
from the
keyboard,
four column
inputs
(COL
0-
3),
and
five
row inputs
(ROW
0-4).
When
the two
inputs
OPT A DET
and
OPT
B
DET
are pulled
low,
they signal
the
processor
that the Option
A or
Option
B boards
are
installed.
Another
input
(OPTO
DIR)
provides
t
he processor
with
the
optical
encoder's
direction
of
rotation.
Two
outputs,
PBO and
PB1,
select the memory page.
14.2.4
CHARACTER DISPLAY
14.2.4.1
General
Characters are
displayed
on
the
CRT
as
8-by-8
dot
matrices.
Thirty-two
dot
matrices, of
which the
last
two are always
blank,
make one character
line.
Sixteen
character
lines,
of which
the last
one
is
always blank,
make a
display
frame. Thus,
the total
number
of ma-
trices available
for character
display
is
30
X 15
or
450.
The
two
blank
matrices
and
the
blank line
are
used for
hor izontal
and
vertical
retrace blanking,
respectively.
The
display
is
generated
by
dot
rows.
As
the CRT
sweeps
the
first
dot
row of a character
line,
the
char-
acter
generator outputs
a serial-bit
pattern
of
1's
and
O's that
turns
the CRT intensity
on and
off.
The
result
is
a row of
dots that, when
combined
with
t he
next
seven
rows,
forms
a
character.
The frame
display is
stored
at
U27
in
32
X
16 bytes
of
RAM;
this
RAM
is
shared
by
the
character
genera-
tor
and the
processor. The two are
synchronized
to
access
the
RAM
during
alternate
half
cycles
of the
master E
clock.
The
RAM
multiplexer (U24-U26)
allows
both
the
processor and the
character
generator
to have
non-interference
access to
the RAM
every
other
0.5 microsecond.
In
RAM, t he processor stores
an 8-bit
word
representing
the
character
to
be
dis-
played.
14.2.4.2
Timing Generator
The timing
generator
provides timing signals
for
the
character
generator.
All
the timing signals
are
syn-
chronized
to the
1-MHz E
clock
from the micropro-
cessor.
The E and Q clocks are
exclusive-OR'd
to
provide
a
2-MHz
signal
which is
used
to
clock
the
8-
bit shift register
(U13).
This
clock signal
provides
the
d
ot rate.
The
1-MHz
E
clock
is
divided-by-four
by U19,
and
the
resulting
signal is
used to latch
one
dot-matrix
row into U11. This
provides
a
dot-matrix
rate
of 250
kHz.
The
divided
-by-four
signal
is
further divided
by
a
12-bit
binary counter
(UlO
and
U15),
to
provide a row
rate
of7812.5
Hz, a
character
line
rate
of976.5
H
z,
and
a frame
rate
of
61.04 Hz.
14.2.4.3
Character Generator
The
character generator
simultaneously scans
the
RAM in sequence
with the CRT
display
scan.
The
sig-
nals
for the
CRT
display
scan
come
from
the
horizon-
tal and vertical character-sweep
generators
on
the
Scope
Amplifier
board
(A7). The
12-bit binary
counter
provides the
9 bits of information
stored
in
RAM. As
each
location
in RAM is
addressed,
the
8-bit
word
st
ored
at
that
location
is
latched into
the 8-bit latch
(U11)
at
the dot-matrix rate
of 250kHz.
Seven
of the
bits are
held
in
the
latch
and
are
applied
to
the
char-
acter ROM
(Ul
2);
the
remaining
bit is
not used.
An
additional 3
bits
from the
12-bit binary
counter tell
which
row of dots
is
being
scanned.
Thus,
the
10
bits
being
applied
to
the
character ROM define
a particu-
lar dot
row
of a
particular
character. T he
8-bit pattern
t hat
defines
this dot row is then available at the out-
put
of
the character
ROM.
This
output is
parallel-
loaded
into the 8-bit
shift
register,
Ul3.
The
8
bits
are
serially shifted out
on
the
CHAR
GEN
Z-AXIS line at
a
dot
rate of 2
MHz. The
12-bit
binary
counter
also
provides
synchronizing
signals
for
the character-sweep
generators
on the A7 board.
The horizontal and
verti-
cal character-sweep generators are
reset
and
started by
one-shots U34A and U34B,
respectively. The
horizon-
tal one-shot enable is located at the
end
of a
dot
row.
The
vertical
one-shot
enable has two sources:
the
CHAR
GEN
RESET
line for
dual-display
mode,
and
the
12-bit binary
counter end-of-frame
for character
display. Also
provided
is a
signal
LINE
1
which
signals
the dual-display
control
on the Scope/DVM
Control
board that the first character line
has
been
traced.
14-2
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