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TO 1/2
A
DATA BUS
DATA BUS
TO 1/2
B
ADDRESS BUS
ADDRESS BUS
TO 1/2
C
CONTROL BUS
CONTROL BUS
FROM/TO 1/2
D
I/O BUS
IC1202
8
D0-D7
PIO
PB00
2
PB01
A3
2
A1
PB02
A2
3
A0
PB03
PB04
PB05
PI0-CS0
79
5
CS0
PB06
PI0-CS1
25
CS1
PB07
RD0
70
RD
WR0
69
WR
PB10
RESE_P0
68
RESET
PB11
PB12
PB13
V
CC
+5V
PB14
INA10
23
PA10
PB15
INA11
22
PA11
PB16
INA12
21
PA12
PB17
INA13
20
PA13
INA14
19
PA14
PC00
INA15
17
PA15
PC01
INA16
16
PA16
PC02
INA17
15
PA17
PC03
PC04
PC05
PC06
PC07
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
IC1112
IC1105
CN8
7
6
INA11
4
DCD1 IN
R1 IN
R1 OUT
RESET
RD
CN8
3
4
20
RXD1 IN
R2 IN
R2 OUT
TX DATA
5
CS
23
22
7
6
DSR1 IN
R3 IN
R3 OUT
DSR
16
17
42
7
CTS1 IN
R4 IN
R4 OUT
CTS
WR
CN-1259,CN1
RS-232C
SIO
DRIVER/RECEIVER
CN8
C/D
2
5
3
1
TXD1 IN
T1 OUT
T1 IN
TX DATA
1
18
9
2
DTR1 IN
T2 OUT
T2 IN
DTR
24
19
8
3
RTS1 IN
T3 OUT
T3 IN
RTS
4
CLK
D0-D7
X1100,
IC1102
IC1100
IC1101
8
13
RXCLK
SW
10
BINARY
30
4.915MHz
TXCLK
COUNTER
OSC
AT-100 (2/2)
8
IC1106
CCU-C50
15
CCU-C51
14
CCU-C52
13
5
CCU-C53
12
I/O
CCU-C54
11
ADDRESS
A6-A10
DECODER
78
OUTA00
CCU-C55
10
PA0
77
OUTA01
RCP-C50
9
IC1100
PA1
76
OUTA02
RCP-C51
7
6
4
1,2
8
PA2
75
OUTA03
PA3
IC1107
74
OUTA04
PA4
73
OUTA05
RCP-C52
15
PA5
72
OUTA06
RCP-C53
14
PA6
5
71
OUTA07
RCP-C54
13
PA7
I/O
RCP-C55
12
ADDRESS
A6-A10
47
INB00
MSU-C50
11
DECODER
48
INB01
VCS-C50
10
49
5
INB02
AXU-C51
7
50
INB03
52
IC1103
INB04
5
53
SI0-C50
INB05
15
55
SI0-C51
INB06
14
I/O
A6-A10
56
PI0-C50
INB07
13
ADDRESS
PI0-C51
12
DECODER
36
5
INB10
37
INB11
38
INB12
39
INB13
40
INB14
42
INB15
43
INB16
IC1109
44
INB17
18
2
INF0-CS
9
INC00
WR0
17
3
WREN-N
10
INC01
RD0
16
CONTROL
4
RDEN-N
BUS
11
INC02
15
5
DATA R/W
BUFF
13
INC03
8
INC04
RESE-P0
13
7
RESE-P1
7
INC05
5
INC06
4
INC07
32
INC10
33
INC11
34
INC12
35
INC13
31
INC14
30
INC15
29
INC16
28
INC17
IC4
18
16
A0
D01
5
RESE-P0
A2-A19
EPROM
A17
D16
37
RD0
4
35
SI0-CS1
2
20
31
WR0
36
A2
IC5
18
16
A0
D01
A2-A19
EPROM
A17
D16
8
2
20
5-6
AT-100 (2/2)
IC1110
D0
2
18
D0
D1
3
17
D1
FROM 1/2
E
CLK
D2
4
16
D2
D3
5
I/O
15
D3
BUS
D4
6
14
D4
BUFF
D5
7
13
D5
V
+5V
CC
D6
8
12
D6
2
D7
9
11
D7
3
4
TC
5
1
19
AVDP-INT
6
7
IC2
IC36
IC1108
6
8
1
9,10
RESET
IC36
A2
18
2
A2
5
12,13
11
A3
17
3
A3
A4
16
4
A4
ADDRESS
A6
15
5
A6
BUS
A7
14
6
A7
BUFF
A8
13
7
A8
A9
12
8
A9
A10
11
9
A10
1
IC9
17
A0
A2-A18
SRAM
A16
IC27
RDEN-N
24 29 22 30
BEN 0
1
3
WREN 0
WREN-N
2
IC10
17
A0
A2-A18
SRAM
A16
D0-D15
IC27
24 29 22 30
BEN 1
4
6
WREN 1
WREN-N
5
RDEN-N
IC11
17
EPROM-CS0
A0
A2-A18
SRAM
A16
IC27
24 29 22 30
BEN 2
10
8
WREN 2
WREN-N
9
D16-D31
IC11
17
A0
SRAM
A2-A18
A16
IC27
24 29 22 30
BEN 3
13
11
WREN 3
WREN-N
12
5-6
IC8
IC1
14
CLK IN
CPU
IC3
19
20
INT5
18
23
INT4
17
24
MODE
INT3
INT.
16
25
SINT2
CONTROLLER
15
26
SINT1
14
27
SINT0
A0
19
ADDR0
A1
18
ADDR1
A2
51
11
ADDR2
A3
52
A/D0
ADDR3
DATAEN-N
43
A/D31
DATAEN
RDEN-N
TC
30
TC
EXTDTEN-N
29
SBRCOND2/
EXTDATAEN
WREN-N
33
MEMSTROBE
RDCE-N
35
RDCEN
ACK-N
36
ACK
BUSERR-N
37
BUSERROR
RESE-NI
38
RESET
BURST
53
BURST/WRNEAR
WR-N
44
WR
RD-N
45
RD
ALE
46
ALE
IC1
5
3
40
SYSCLK
DATA BUS
ADDRESS BUS
CONTROL BUS
8
D0
D0-D7
D7
8
D0
D8-D15
D7
8
D0
D16-D23
D7
8
D0
D24-D31
D7
IC26,28
CHIP ENABLE
GEN.
Q3,4
BACKUP
DC
32
CNU-500
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