HP 3478A Technical Manual page 115

3478A 3478A
b. b. Whe When U50 n U503 is ad 3 is addre
WR (Write) line is low, data from the CPU is sent over WR (Write) line is low, data from the CPU is
the Data Lines to U503. 3. Line WR gets its low f the Data Lines to U50
CPU's WR line. CPU's WR line. With the With the CPU R line
line is high (which makes U503's RD line high). line is high (which makes U503's RD line high).
Depending on the Address selected (RSO to RS2 at Depending on the Address selected (RSO to RS2 at
U503 pins 21 to 23, which are the AO to A2 Address U503 pins 21 to 23, which are
Lines of the CPU), U503 interprets the data as a Lines of the CPU), U503 interprets the data as a
command (ATN, SRQ, etc.) or data (DIOI to D107) and command (ATN, SRQ, etc.) or data (DIOI to D107) and
sends the appropriate information to the HP-IB. sends the appropriate information to the HP-IB.
c. c. Whe When U50 n U503 is ad 3 is addre
RD line is low, RD line is low, U503 is enabled to send data to the CPU U503 is enabled to send data to the CPU
over the Data Lines. Line RD gets its low f over the Data Lines. Line RD gets its low from the
CPU's RD line. Depending on t CPU's RD line. Depending on the Address selec
(RSO to RS2, see previous step), the data may be (RSO to RS2, see previous step), the data may be
remote data from the HP-IB (Program Codes, etc.) and remote data from the HP-IB (Program Codes, etc.) and
status information (Remote, Local, etc.). status information (Remote, Local, etc.).
d. d. The CP The CPU con U contin tinuou
and updates U503. and updates U503.
7-F68. 7-F 68. Rea Rear Pan r Panel Swi el Switch C
Switch (S501) is an 8 section DIP switch used Switch (S501) is an 8 section DIP switch used to select
the 3478A's HP-IB Address, set the Power-On SRQ the 3478A's HP-IB Address, set the Power-On SRQ
Status Bit, set the 3478A to the Talk-Only Mode, and to Status Bit, set the 3478A to the Talk-Only Mode, and to
set the multimeter to the selected set the multimeter to the selected power line frequency.
The switch positions are determined by the CPU when The switch positions are determined by the CPU when
driver US10 is enabled. The switches that a driver US10 is enabled.
will then bring t will then bring the corresponding he corresponding data lines low.
driver is enabled when line GI (CPU's RD line) and G2 driver is enabled when line GI (CPU's RD line) and G2
(from flip-flop US06) (from flip-flop US06) are both low. are both low. The operation of
switches is as follows: switches is as follows:
a. a. HP HP- - IB IB Ad Addr dres ess s . . The switches m
set the 3478 set the 3478A's HP-IB Addres A's HP-IB Address. s. When the CPU
determines the setting of the switches, i determines the setting of the switches, it passes the
information to the HP-IB Chip. information to the HP-IB Chip. (Refer to this m
Section III for more information on addressing the Section III for more information on addressing
3478A.) 3478A.)
b. b. Po Powe wer- r-On On SR SRQ Q Bi
SRQ is used to set the Power-On SRQ Status SRQ is used to set t he Power-On SRQ Status Bit.
setting of this switch is also passed on to the HP-IB Chip. setting of this switch is also passed on to
(Refer to Section III of this manual for information on (Refer to Section III of this manual for information on
SRQ.) SRQ.)
c. c. Ta Talk lk-O -Onl nly y Mo Mode de. . When all
are on, the 3478A's Talk-Only Mode is selected are on, the 3478A's Talk-Only Mode is selected. . Here
again, the CPU sends the necessary information to the again, the CPU sends the necessary information to the
HP-IB Chip. HP-IB Chip.
d. d. Po Powe wer r Lin Line e Fr Freq eque
used to set the 3478A for the correct power line used to set the 3478A for the correct power line
frequency. frequency. The CPU determines t The CPU determines the position of the
switch and passes it on to the A/D Controller (located in switch and passes it on to the A/D Controller (located in
the Floating Common Circuitry). the Floating Com mon Circuitry). Dependent on t
position of the switch, the A/D Controller selects the position of the switch, the A/D Controller selects the
corresponding Integration Time of the A/D Converter corresponding Integration Time of the A/D Converter
(1/60 second for 60Hz or 1/50 second for 50Hz, etc.). (1/60 second for 60Hz or 1/50 second for 50Hz, etc.).
dresse ssed (b d (by the y the CPU CPU) an ) and its
sent over
Line WR gets its low from the rom the
CPU R line low, its low, its RD (Read) RD (Read)
the AO to A2 Address
dresse ssed (b d (by the y the CPU CPU) an ) and its
rom the
he Address selected
uously ch sly check ecks (fo s (for HP- r HP-IB da IB data)
tch Circ ircuit uitry ry. . The The Rear Rear Panel
to select
power line frequency.
The switches that are on (set) re on (set)
data lines low. The
The operation of the
The switches marked AO to arked AO to A4
When the CPU
t passes the
(Refer to this manual's anual's
the
Bit t . . The switch The switch marked marked POW
Bit. The
the HP-IB Chip.
When all AO to AO to A4 switches A4 switches
uenc ncy y . . The 50/60Hz The 50/60Hz switch is
he position of the
Dependent on the
d its
7-F- 7-F-69. 69. Voltm
pulse is connected to inverter U508C from the PROG pulse is connected to inverter U508C from the PROG
line of U501. line of U501. The output of U5
inverters U508D, E, and F with their outputs connected inverters U508D, E, and F with their outputs connected
to the Voltmete to the Voltmeter Complete Terminal.
E, and F are used as output buffers and CR504, CR505, E, and F are used as output buffers and CR504, CR505,
and R538 is the pro and R538 is the protection circuitry.
complete output is a negative going TTL pulse with a complete output is a negative going TTL pulse with a
duration of approximately 1 duration of approximately 1
7-F-70. 7-F- 70. Exter
d its
(connected to the External trigger Input) is (connected to the External trigger Input) is used to trigger
the 3478A, when the multimeter is in the External Trigger the 3478A, when the multimeter is in the External Trigger
mode. mode. The operation
ted
a. a. Whe
flip-flop U514B is clocked and its Q output goes high. flip-flop U514B is clocked and its Q output goes high.
Since the Q output is connected to the INT input of the Since the Q output is connected to the INT input of the
CPU, MT goes high. CPU, MT goes high.
ta)
b. b. If th
other than the External Trigger mode, no action is taken. other than the External Trigger mode, no action is taken.
Panel
INT remains high. INT remains high.
c. c. If th
CPU checks the sta CPU checks the state of the INT line.
the 3478A is trigger the 3478A is triggered.
on checking the line until INT goes high on checking the line until INT goes high or the 3478A is
configured to another trigger mode. configured to another trigger mode.
The
d. d. Whe
External Trigger mode), the 3478A triggers and initiates External Trigger mode), the 3478A triggers and
the
a measurement cycle. a measurement cycle.
e. e. Dur
A4
and sends out a trigger pulse (from its TRIG output at and sends out a trigger pulse (from its TRIG output at
U503 pin 5). U503 pin 5).
f. f.
configured as an inverter) and resets flip-flop U514B. configured as an inverter) and resets
The 3478A is now ready for a new trigger pulse. The 3478A is now ready for a new
POW
7-F-71. Isolation 7-F-71.
The
7-F-72. The 3478A's Isolat 7-F-72.
communicate between the CPU (U501) in the Chassis communicate between the CPU (U501) in the Chassis
Common Circuitry and the CPU (U462) in the Floating Common Circuitry and the CPU (U462) in the Floating
Common Circuitry. The serial data from Common Circuitry.
U462) is used to control the operation of Floating U462) is used to control the operation of Floating
Here
Common Circuitry. y. This includes instru Common Circuitr
information (Function, Range, etc.) and A/D information information (Function, Range, etc.) and A/D information
(like changing the integration time). (like changing the integr
U462 to U501 is the multimeter's measurement data and U462 to U501 is
switch is
certain self-test certain self-test data (A/D test
following explains the circuitry operation. following explains the circuitry operation.
7-F-73. 7-F-73. The data from
he
(U501 pin 38) and applied to drivers US08A and U508B. (U501 pin 38) and applied to drivers US08A and
The drivers apply the data to the input (primary) of The drivers apply the data to the input (primary) of
transformer T50. transformer
7-F-20 7-F-20
Voltmeter eter Compl Complete ete. . The Voltm
The output of U508C is connected to 08C is connected to
r Complete Terminal. Inverters U508D,
tection circuitry. The voltmeter
S S . .
µ µ
External nal Trigge Trigger r . . An exter An external trigger
The operation is as is as follows: follows:
When an ext n an extern ernal tri al trigge gger puls
If the 347 e 3478A is c 8A is conf onfigu igured t red to a tri
If the 347 e 3478A is in t 8A is in the Ex he Exter
te of the INT line. If the line is high,
ed. If the line is low, t If the line is low, the CPU keeps
When INT n INT goe goes hig s high (an h (and th
During t ing that t hat time ime, the H , the HP-I P-IB Chip i
The The pul pulse i se is in s inver verted ted by f by flip
Isolation Logic Logic
The 3478A's Isolation Logic is u ion Logic is used to
The serial data from U501 (going to
This includes instrument set-up
ation time). The serial data fro
the multimeter's measurement data and
data (A/D test information). information). The
The data from USO1 is output from USO1 is output from Port P27
T50. The output of T501 The output of T501 is applied to
TM 11-6625-3071-14 TM 11-6625-3071-14
The Voltmeter eter Complete Complete
Inverters U508D,
The voltmeter
nal trigger pulse pulse
used to trigger
r pulse is rec e is receiv eived, J ed, J-K -K
o a trigge gger mod r mode e
ternal T nal Trig rigger m ger mode ode, the , the
If the line is high,
he CPU keeps
or the 3478A is
d the 347 e 3478A is 8A is in th in the e
initiates
B Chip is add s addres ressed sed
lip-fl -flop U op U514 514A (w A (whic hich is h is
flip-flop U514B.
trigger pulse.
sed to
U501 (going to
ment set-up
The serial data from m
The
Port P27
U508B.
is applied to